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Commit 6504e07a authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "irqchip: gic-v3: support to get pending irqs and highprio irq"

parents 5692252e d3b7378f
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+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@
#include <asm/sysreg.h>

#define ICC_EOIR1_EL1			sys_reg(3, 0, 12, 12, 1)
#define ICC_HPPIR1_EL1			sys_reg(3, 0, 12, 12, 2)
#define ICC_DIR_EL1			sys_reg(3, 0, 12, 11, 1)
#define ICC_IAR1_EL1			sys_reg(3, 0, 12, 12, 0)
#define ICC_SGI1R_EL1			sys_reg(3, 0, 12, 11, 5)
+39 −0
Original line number Diff line number Diff line
@@ -132,6 +132,45 @@ static u64 __maybe_unused gic_read_iar(void)
}
#endif

/*
 * gic_show_pending_irq - Shows the pending interrupts
 * Note: Interrupts should be disabled on the cpu from which
 * this is called to get accurate list of pending interrupts.
 */
void gic_show_pending_irqs(void)
{
	void __iomem *base;
	u32 pending[32], enabled;
	unsigned int j;

	base = gic_data.dist_base;
	for (j = 0; j * 32 < gic_data.irq_nr; j++) {
		enabled = readl_relaxed(base +
					GICD_ISENABLER + j * 4);
		pending[j] = readl_relaxed(base +
					GICD_ISPENDR + j * 4);
		pending[j] &= enabled;
		pr_err("Pending irqs[%d] %x\n", j, pending[j]);
	}
}

/*
 * get_gic_highpri_irq - Returns next high priority interrupt on current CPU
 */
unsigned int get_gic_highpri_irq(void)
{
	unsigned long flags;
	unsigned int val = 0;

	local_irq_save(flags);
	val = read_gicreg(ICC_HPPIR1_EL1);
	local_irq_restore(flags);

	if (val >= 1020)
		return 0;
	return val;
}

static void gic_enable_redist(bool enable)
{
	void __iomem *rbase;
+2 −0
Original line number Diff line number Diff line
@@ -450,6 +450,8 @@ static inline bool gic_enable_sre(void)
	return !!(val & ICC_SRE_EL1_SRE);
}

void gic_show_pending_irqs(void);
unsigned int get_gic_highpri_irq(void);
#endif

#endif