mtd: nand: fsmc: update of OF support (64ddba4d) · Commits · e / devices / android_kernel_fairphone_FP3

Documentation/devicetree/bindings/mtd/fsmc-nand.txt

+24 −1

Original line number	Original line	Diff line number	Diff line
	* FSMC NAND		ST Microelectronics Flexible Static Memory Controller (FSMC)
			NAND Interface

	Required properties:		Required properties:
	- compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"		- compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
	@@ -9,6 +10,26 @@ Optional properties:
	- bank-width : Width (in bytes) of the device. If not present, the width		- bank-width : Width (in bytes) of the device. If not present, the width
	defaults to 1 byte		defaults to 1 byte
	- nand-skip-bbtscan: Indicates the the BBT scanning should be skipped		- nand-skip-bbtscan: Indicates the the BBT scanning should be skipped
			- timings: array of 6 bytes for NAND timings. The meanings of these bytes
			are:
			byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
			are valid. Zero means one clockcycle, 15 means 16 clock
			cycles.
			byte 1 TAR : ALE to RE delay, 4 bits are valid. Same format as TCLR.
			byte 2 THIZ : number of HCLK clock cycles during which the data bus is
			kept in Hi-Z (tristate) after the start of a write access.
			Only valid for write transactions. Zero means zero cycles,
			255 means 255 cycles.
			byte 3 THOLD : number of HCLK clock cycles to hold the address (and data
			when writing) after the command deassertation. Zero means
			one cycle, 255 means 256 cycles.
			byte 4 TWAIT : number of HCLK clock cycles to assert the command to the
			NAND flash in response to SMWAITn. Zero means 1 cycle,
			255 means 256 cycles.
			byte 5 TSET : number of HCLK clock cycles to assert the address before the
			command is asserted. Zero means one cycle, 255 means 256
			cycles.
			- bank: default NAND bank to use (0-3 are valid, 0 is the default).

	Example:		Example:

	@@ -24,6 +45,8 @@ Example:

	bank-width = <1>;		bank-width = <1>;
	nand-skip-bbtscan;		nand-skip-bbtscan;
			timings = /bits/ 8 <0 0 0 2 3 0>;
			bank = <1>;

	partition@0 {		partition@0 {
	...		...

drivers/mtd/nand/fsmc_nand.c

+18 −0

Original line number	Original line	Diff line number	Diff line
	@@ -889,6 +889,24 @@ static int fsmc_nand_probe_config_dt(struct platform_device *pdev,
	if (of_get_property(np, "nand-skip-bbtscan", NULL))		if (of_get_property(np, "nand-skip-bbtscan", NULL))
	pdata->options = NAND_SKIP_BBTSCAN;		pdata->options = NAND_SKIP_BBTSCAN;

			pdata->nand_timings = devm_kzalloc(&pdev->dev,
			sizeof(*pdata->nand_timings), GFP_KERNEL);
			if (!pdata->nand_timings) {
			dev_err(&pdev->dev, "no memory for nand_timing\n");
			return -ENOMEM;
			}
			of_property_read_u8_array(np, "timings", (u8 *)pdata->nand_timings,
			sizeof(*pdata->nand_timings));

			/* Set default NAND bank to 0 */
			pdata->bank = 0;
			if (!of_property_read_u32(np, "bank", &val)) {
			if (val > 3) {
			dev_err(&pdev->dev, "invalid bank %u\n", val);
			return -EINVAL;
			}
			pdata->bank = val;
			}
	return 0;		return 0;
	}		}
	#else		#else

include/linux/mtd/fsmc.h

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -137,6 +137,7 @@ enum access_mode {

	/**		/**
	* fsmc_nand_platform_data - platform specific NAND controller config		* fsmc_nand_platform_data - platform specific NAND controller config
			* @nand_timings: timing setup for the physical NAND interface
	* @partitions: partition table for the platform, use a default fallback		* @partitions: partition table for the platform, use a default fallback
	* if this is NULL		* if this is NULL
	* @nr_partitions: the number of partitions in the previous entry		* @nr_partitions: the number of partitions in the previous entry