Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 64baf9f5 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Reflect updates to the GCC clock frequency plan for SDM845"

parents e464100f 0842b275

arch/arm64/boot/dts/qcom/sdm845-cdp.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -169,10 +169,6 @@ 
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;



	qcom,clk-rates = <400000 20000000 25000000

				50000000 100000000 200000000>;

	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";



	extcon = <&extcon_storage_cd>;



	status = "ok";

arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -245,10 +245,6 @@ 
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;



	qcom,clk-rates = <400000 20000000 25000000

				50000000 100000000 200000000>;

	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";



	extcon = <&extcon_storage_cd>;



	status = "ok";

arch/arm64/boot/dts/qcom/sdm845-qrd.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -170,10 +170,6 @@ 
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;



	qcom,clk-rates = <400000 20000000 25000000

				50000000 100000000 200000000>;

	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";



	extcon = <&extcon_storage_cd>;



	status = "ok";

arch/arm64/boot/dts/qcom/sdm845-v2.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -17,6 +17,14 @@ 
	qcom,msm-id = <321 0x20000>;

};



&sdhc_2 {

	qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000

				   100000000 200000000 4294967295>;

	qcom,clk-rates = <400000 20000000 25000000 50000000

			  100000000 200000000>;

	qcom,devfreq,freq-table = <50000000 200000000>;

};



&clock_gcc {

	compatible = "qcom,gcc-sdm845-v2";

};

arch/arm64/boot/dts/qcom/sdm845.dtsi

+7 −2
Original line number Diff line number Diff line
@@ -1676,13 +1676,18 @@ 
			<81 512 1338562 4096000>,

			<1 608 1338562 4096000>;

		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000

			100000000 200000000 4294967295>;

			100750000 200000000 4294967295>;



		qcom,sdr104-wa;



		qcom,restore-after-cx-collapse;



		qcom,devfreq,freq-table = <50000000 200000000>;

		qcom,clk-rates = <400000 20000000 25000000

					50000000 100000000 201500000>;

		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",

				      "SDR104";



		qcom,devfreq,freq-table = <50000000 201500000>;

		clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>,

			<&clock_gcc GCC_SDCC2_APPS_CLK>;

		clock-names = "iface_clk", "core_clk";