Merge "drm/msm: update sde rsc backoff time and mode-2 sequence" into msm-4.9 (6474d13c) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/drm/msm/sde_rsc.c

+22 −11

Original line number	Diff line number	Diff line
		@@ -28,16 +28,19 @@
		#include <drm/drmP.h>
		#include <drm/drm_irq.h>
		#include "sde_rsc_priv.h"
		#include "sde_dbg.h"

		/* this time is ~0.02ms */
		#define RSC_BACKOFF_TIME_NS 20000
		/* worst case time to execute the one tcs vote(sleep/wake) - ~1ms */
		#define TCS_CASE_EXECUTION_TIME 1064000

		/* next two values should be same based on doc */
		/* this time is ~1ms - only wake tcs in any mode */
		#define RSC_BACKOFF_TIME_NS (TCS_CASE_EXECUTION_TIME + 100)

		/* this time is ~0.2ms */
		#define RSC_MODE_THRESHOLD_TIME_IN_NS 200000
		/* this time is ~0.2ms */
		#define RSC_TIME_SLOT_0_NS 200000
		/* this time is ~1ms - only wake TCS in mode-0 */
		#define RSC_MODE_THRESHOLD_TIME_IN_NS ((TCS_CASE_EXECUTION_TIME >> 1) + 100)

		/* this time is ~2ms - sleep+ wake TCS in mode-1 */
		#define RSC_TIME_SLOT_0_NS ((TCS_CASE_EXECUTION_TIME * 2) + 100)

		#define DEFAULT_PANEL_FPS 60
		#define DEFAULT_PANEL_JITTER 5
		@@ -74,6 +77,7 @@ struct sde_rsc_client sde_rsc_client_create(u32 rsc_index, char client_name,
		{
		struct sde_rsc_client *client;
		struct sde_rsc_priv *rsc;
		static int id;

		if (!client_name) {
		pr_err("client name is null- not supported\n");
		@@ -83,7 +87,7 @@ struct sde_rsc_client sde_rsc_client_create(u32 rsc_index, char client_name,
		return ERR_PTR(-EINVAL);
		} else if (!rsc_prv_list[rsc_index]) {
		pr_err("rsc not probed yet or not available\n");
		return ERR_PTR(-EINVAL);
		return NULL;
		}

		rsc = rsc_prv_list[rsc_index];
		@@ -95,12 +99,14 @@ struct sde_rsc_client sde_rsc_client_create(u32 rsc_index, char client_name,
		strlcpy(client->name, client_name, MAX_RSC_CLIENT_NAME_LEN);
		client->current_state = SDE_RSC_IDLE_STATE;
		client->rsc_index = rsc_index;
		client->id = id;
		if (is_primary_client)
		rsc->primary_client = client;
		pr_debug("client %s rsc index:%d primary:%d\n", client_name,
		rsc_index, is_primary_client);

		list_add(&client->list, &rsc->client_list);
		id++;
		mutex_unlock(&rsc->client_lock);

		return client;
		@@ -502,6 +508,8 @@ int sde_rsc_client_state_update(struct sde_rsc_client *caller_client,
		return -EINVAL;

		mutex_lock(&rsc->client_lock);
		SDE_EVT32(caller_client->id, caller_client->current_state,
		state, rsc->current_state, SDE_EVTLOG_FUNC_ENTRY);
		caller_client->crtc_id = crtc_id;
		caller_client->current_state = state;

		@@ -559,14 +567,20 @@ int sde_rsc_client_state_update(struct sde_rsc_client *caller_client,

		if (rc == STATE_UPDATE_NOT_ALLOWED) {
		rc = 0;
		SDE_EVT32(caller_client->id, caller_client->current_state,
		state, rsc->current_state, rc, SDE_EVTLOG_FUNC_CASE1);
		goto clk_disable;
		} else if (rc) {
		pr_debug("state:%d update failed rc:%d\n", state, rc);
		SDE_EVT32(caller_client->id, caller_client->current_state,
		state, rsc->current_state, rc, SDE_EVTLOG_FUNC_CASE2);
		goto clk_disable;
		}

		pr_debug("state switch successfully complete: %d\n", state);
		rsc->current_state = state;
		SDE_EVT32(caller_client->id, caller_client->current_state,
		state, rsc->current_state, SDE_EVTLOG_FUNC_EXIT);

		clk_disable:
		if (rsc->current_state == SDE_RSC_IDLE_STATE)
		@@ -1063,9 +1077,6 @@ static int sde_rsc_probe(struct platform_device *pdev)
		pr_err("sde rsc:get display rsc failed ret:%d\n", ret);
		goto sde_rsc_fail;
		}
		rpmh_invalidate(rsc->disp_rsc);
		/* call flush to disable the disp rsc interrupt */
		rpmh_flush(rsc->disp_rsc);

		ret = msm_dss_ioremap_byname(pdev, &rsc->wrapper_io, "wrapper");
		if (ret) {

drivers/gpu/drm/msm/sde_rsc_hw.c

+27 −22

Original line number	Diff line number	Diff line
		@@ -95,6 +95,7 @@
		#define SDE_RSCC_F1_QTMR_V1_CNTP_CTL 0x302C

		#define MAX_CHECK_LOOPS 500
		#define POWER_CTRL_BIT_12 12

		static void rsc_event_trigger(struct sde_rsc_priv *rsc, uint32_t event_type)
		{
		@@ -191,27 +192,27 @@ static int rsc_hw_seq_memory_init(struct sde_rsc_priv *rsc)
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x18,
		0xa138ebaa, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x1c,
		0xe0a581e1, rsc->debug_mode);
		0xaca581e1, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x20,
		0x82e2a2ed, rsc->debug_mode);
		0xe2a2ede0, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x24,
		0x88ea8a39, rsc->debug_mode);
		0xea8a3982, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x28,
		0xa6e9a920, rsc->debug_mode);
		0xa920888c, rsc->debug_mode);

		/* tcs sleep sequence */
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x2c,
		0xa92089e6, rsc->debug_mode);
		0x89e6a6e9, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x30,
		0x89e7a7e9, rsc->debug_mode);
		0xa7e9a920, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x34,
		0x00000020, rsc->debug_mode);
		0x002079e7, rsc->debug_mode);

		/* branch address */
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_CFG_BR_ADDR_0_DRV0,
		0x29, rsc->debug_mode);
		0x2b, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_CFG_BR_ADDR_1_DRV0,
		0x2f, rsc->debug_mode);
		0x31, rsc->debug_mode);

		return 0;
		}
		@@ -266,7 +267,7 @@ static int rsc_hw_solver_init(struct sde_rsc_priv *rsc)
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM0_DRV0_MODE0,
		mode_0_start_addr, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM1_DRV0_MODE0,
		0x80000010, rsc->debug_mode);
		0x80000000, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM2_DRV0_MODE0,
		rsc->timer_config.rsc_backoff_time_ns, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM3_DRV0_MODE0,
		@@ -275,7 +276,7 @@ static int rsc_hw_solver_init(struct sde_rsc_priv *rsc)
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM0_DRV0_MODE1,
		mode_1_start_addr, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM1_DRV0_MODE1,
		0x80000010, rsc->debug_mode);
		0x80000000, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM2_DRV0_MODE1,
		rsc->timer_config.rsc_backoff_time_ns, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM3_DRV0_MODE1,
		@@ -284,9 +285,9 @@ static int rsc_hw_solver_init(struct sde_rsc_priv *rsc)
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM0_DRV0_MODE2,
		mode_2_start_addr, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM1_DRV0_MODE2,
		0x80000010, rsc->debug_mode);
		0x80000000, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM2_DRV0_MODE2,
		rsc->timer_config.rsc_backoff_time_ns, rsc->debug_mode);
		0x0, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_MODE_PARM3_DRV0_MODE2,
		rsc->timer_config.pdc_backoff_time_ns, rsc->debug_mode);

		@@ -297,6 +298,7 @@ int sde_rsc_mode2_entry(struct sde_rsc_priv *rsc)
		{
		int rc;
		int count, wrapper_status;
		unsigned long reg;

		if (rsc->power_collapse_block)
		return -EINVAL;
		@@ -355,6 +357,18 @@ int sde_rsc_mode2_entry(struct sde_rsc_priv *rsc)
		if (rc) {
		pr_err("vdd fs is still enabled\n");
		goto end;
		} else {
		rc = -EINVAL;
		/* this wait is required to turn off the rscc clocks */
		for (count = MAX_CHECK_LOOPS; count > 0; count--) {
		reg = dss_reg_r(&rsc->wrapper_io,
		SDE_RSCC_PWR_CTRL, rsc->debug_mode);
		if (test_bit(POWER_CTRL_BIT_12, &reg)) {
		rc = 0;
		break;
		}
		usleep_range(1, 2);
		}
		}

		if ((rsc->current_state == SDE_RSC_VID_STATE) \|\|
		@@ -458,9 +472,6 @@ static int sde_rsc_state_update(struct sde_rsc_priv *rsc,
		0x1, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io, SDE_RSCC_SOLVER_OVERRIDE_CTRL_DRV0,
		0x0, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io,
		SDE_RSC_SOLVER_SOLVER_MODES_ENABLED_DRV0, 0x7,
		rsc->debug_mode);
		reg = dss_reg_r(&rsc->wrapper_io,
		SDE_RSCC_WRAPPER_OVERRIDE_CTRL, rsc->debug_mode);
		reg \|= (BIT(0) \| BIT(8));
		@@ -484,9 +495,6 @@ static int sde_rsc_state_update(struct sde_rsc_priv *rsc,
		reg &= ~(BIT(1) \| BIT(0));
		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_OVERRIDE_CTRL,
		reg, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io,
		SDE_RSC_SOLVER_SOLVER_MODES_ENABLED_DRV0, 0x5,
		rsc->debug_mode);
		/* make sure that solver mode is override */
		wmb();

		@@ -501,9 +509,6 @@ static int sde_rsc_state_update(struct sde_rsc_priv *rsc,
		reg &= ~(BIT(8) \| BIT(0));
		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_OVERRIDE_CTRL,
		reg, rsc->debug_mode);
		dss_reg_w(&rsc->drv_io,
		SDE_RSC_SOLVER_SOLVER_MODES_ENABLED_DRV0, 0x5,
		rsc->debug_mode);
		/* make sure that solver mode is disabled */
		wmb();
		break;

include/linux/sde_rsc.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -79,6 +79,7 @@ enum sde_rsc_state {
		* @current_state: current client state
		* @crtc_id: crtc_id associated with this rsc client.
		* @rsc_index: rsc index of a client - only index "0" valid.
		* @id: Index of client. It will be assigned during client_create call
		* @list: list to attach client master list
		*/
		struct sde_rsc_client {
		@@ -86,6 +87,7 @@ struct sde_rsc_client {
		short current_state;
		int crtc_id;
		u32 rsc_index;
		u32 id;
		struct list_head list;
		};