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Commit 6376931b authored by Moritz Fischer's avatar Moritz Fischer Committed by Greg Kroah-Hartman
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fpga: zynq-fpga: Fix unbalanced clock handling 



This commit fixes the unbalanced clock handling, where
a failed probe would leave the clock with an enable count of -1.

Reported-by: default avatarJosh Cartwright <joshc@ni.com>
Signed-off-by: default avatarMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 525d12f2

drivers/fpga/zynq-fpga.c

+2 −2
Original line number Diff line number Diff line
@@ -487,7 +487,7 @@ static int zynq_fpga_probe(struct platform_device *pdev) 
				&zynq_fpga_ops, priv);

	if (err) {

		dev_err(dev, "unable to register FPGA manager");

		clk_disable_unprepare(priv->clk);

		clk_unprepare(priv->clk);

		return err;

	}
@@ -502,7 +502,7 @@ static int zynq_fpga_remove(struct platform_device *pdev) 


	priv = platform_get_drvdata(pdev);



	clk_disable_unprepare(priv->clk);

	clk_unprepare(priv->clk);



	return 0;

}