Merge "ARM: dts: msm: Add video clocks on SDM670" (6323fd84) · Commits · e / devices / android_kernel_fairphone_FP3

arch/arm64/boot/dts/qcom/sdm670-vidc.dtsi

+8 −4

Original line number	Diff line number	Diff line
		@@ -129,15 +129,19 @@

		/* Clocks */
		clock-names = "core_clk", "iface_clk", "bus_clk",
		"core0_clk", "core0_bus_clk";
		"core0_clk", "core0_bus_clk", "core1_clk",
		"core1_bus_clk";
		clocks = <&clock_videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
		<&clock_videocc VIDEO_CC_VENUS_AHB_CLK>,
		<&clock_videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
		<&clock_videocc VIDEO_CC_VCODEC0_CORE_CLK>,
		<&clock_videocc VIDEO_CC_VCODEC0_AXI_CLK>;
		<&clock_videocc VIDEO_CC_VCODEC0_AXI_CLK>,
		<&clock_videocc VIDEO_CC_VCODEC1_CORE_CLK>,
		<&clock_videocc VIDEO_CC_VCODEC1_AXI_CLK>;
		qcom,proxy-clock-names = "core_clk", "iface_clk",
		"bus_clk", "core0_clk", "core0_bus_clk";
		qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0>;
		"bus_clk", "core0_clk", "core0_bus_clk",
		"core1_clk", "core1_bus_clk";
		qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0 0x4 0x4>;
		qcom,allowed-clock-rates = <100000000 200000000 330000000
		364700000>;

+6 −0

Original line number	Diff line number	Diff line
		@@ -25,6 +25,7 @@
		enum clock_properties {
		CLOCK_PROP_HAS_SCALING = 1 << 0,
		CLOCK_PROP_HAS_MEM_RETENTION = 1 << 1,
		CLOCK_PROP_DISABLE_MEMCORE_ONLY = 1 << 2,
		};

		#define PERF_GOV "performance"
		@@ -666,6 +667,11 @@ static int msm_vidc_load_clock_table(
		else
		vc->has_mem_retention = false;

		if (clock_props[c] & CLOCK_PROP_DISABLE_MEMCORE_ONLY)
		vc->disable_memcore_only = true;
		else
		vc->disable_memcore_only = false;

		dprintk(VIDC_DBG, "Found clock %s: scale-able = %s\n", vc->name,
		vc->count ? "yes" : "no");
		}

+2 −1

Original line number	Diff line number	Diff line
		/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -90,6 +90,7 @@ struct clock_info {
		u32 count;
		bool has_scaling;
		bool has_mem_retention;
		bool disable_memcore_only;
		};

		struct clock_set {

+11 −0

Original line number	Diff line number	Diff line
		@@ -1097,6 +1097,8 @@ static int __set_clocks(struct venus_hfi_device *device, u32 freq)
		int rc = 0;

		venus_hfi_for_each_clock(device, cl) {
		if (cl->disable_memcore_only)
		continue;
		if (cl->has_scaling) {/* has_scaling */
		device->clk_freq = freq;
		rc = clk_set_rate(cl->clk, freq);
		@@ -3362,6 +3364,8 @@ static inline void __disable_unprepare_clks(struct venus_hfi_device *device)
		}

		venus_hfi_for_each_clock_reverse(device, cl) {
		if (cl->disable_memcore_only)
		continue;
		dprintk(VIDC_DBG, "Clock: %s disable and unprepare\n",
		cl->name);
		rc = clk_set_flags(cl->clk, CLKFLAG_NORETAIN_PERIPH);
		@@ -3391,6 +3395,11 @@ static inline int __prepare_enable_clks(struct venus_hfi_device *device)
		}

		venus_hfi_for_each_clock(device, cl) {
		/* MEM CORE is ON by default. Unset it for unused clocks*/
		if (cl->disable_memcore_only) {
		clk_set_flags(cl->clk, CLKFLAG_NORETAIN_MEM);
		continue;
		}
		/*
		* For the clocks we control, set the rate prior to preparing
		* them. Since we don't really have a load at this point, scale
		@@ -3428,6 +3437,8 @@ static inline int __prepare_enable_clks(struct venus_hfi_device *device)

		fail_clk_enable:
		venus_hfi_for_each_clock_reverse_continue(device, cl, c) {
		if (cl->disable_memcore_only)
		continue;
		dprintk(VIDC_ERR, "Clock: %s disable and unprepare\n",
		cl->name);
		clk_disable_unprepare(cl->clk);