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Commit 62f6924c authored by Arun Chandran's avatar Arun Chandran Committed by David S. Miller
Browse files

net: macb: Add on the fly CPU endianness detection 



Program management descriptor's access mode according to the
dynamically detected CPU endianness.

Signed-off-by: default avatarArun Chandran <achandran@mvista.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 759c9359

drivers/net/ethernet/cadence/macb.c

+18 −4
Original line number Diff line number Diff line
@@ -1578,6 +1578,7 @@ static u32 macb_dbw(struct macb *bp) 
static void macb_configure_dma(struct macb *bp)

{

	u32 dmacfg;

	u32 tmp, ncr;



	if (macb_is_gem(bp)) {

		dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
@@ -1586,10 +1587,23 @@ static void macb_configure_dma(struct macb *bp) 
			dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg);

		dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);

		dmacfg &= ~GEM_BIT(ENDIA_PKT);

		/* Tell the chip to byteswap descriptors on big-endian hosts */

#ifdef __BIG_ENDIAN

		dmacfg |= GEM_BIT(ENDIA_DESC);

#endif



		/* Find the CPU endianness by using the loopback bit of net_ctrl

		 * register. save it first. When the CPU is in big endian we

		 * need to program swaped mode for management descriptor access.

		 */

		ncr = macb_readl(bp, NCR);

		__raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR);

		tmp =  __raw_readl(bp->regs + MACB_NCR);



		if (tmp == MACB_BIT(LLB))

			dmacfg &= ~GEM_BIT(ENDIA_DESC);

		else

			dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */



		/* Restore net_ctrl */

		macb_writel(bp, NCR, ncr);



		if (bp->dev->features & NETIF_F_HW_CSUM)

			dmacfg |= GEM_BIT(TXCOEN);

		else