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Commit 62b9e063 authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: Use tegra_commit_dc() in output drivers 



All output drivers have open-coded variants of this function, so export
it to remove some code duplication.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 4cd4df80

drivers/gpu/drm/tegra/dc.c

+1 −1
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ static void tegra_dc_cursor_commit(struct tegra_dc *dc) 
 * into the ACTIVE copy, either immediately if the display controller is in

 * STOP mode, or at the next frame boundary otherwise.

 */

static void tegra_dc_commit(struct tegra_dc *dc)

void tegra_dc_commit(struct tegra_dc *dc)

{

	tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

	tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/drm.h

+1 −0
Original line number Diff line number Diff line
@@ -177,6 +177,7 @@ struct tegra_dc_window { 
void tegra_dc_enable_vblank(struct tegra_dc *dc);

void tegra_dc_disable_vblank(struct tegra_dc *dc);

void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);

void tegra_dc_commit(struct tegra_dc *dc);



struct tegra_output_ops {

	int (*enable)(struct tegra_output *output);

drivers/gpu/drm/tegra/dsi.c

+2 −4
Original line number Diff line number Diff line
@@ -658,8 +658,7 @@ static int tegra_output_dsi_enable(struct tegra_output *output) 
		 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE;

	tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);



	tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

	tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);

	tegra_dc_commit(dc);



	/* enable DSI controller */

	tegra_dsi_enable(dsi);
@@ -778,8 +777,7 @@ static int tegra_output_dsi_disable(struct tegra_output *output) 
		value &= ~DSI_ENABLE;

		tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);



		tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

		tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);

		tegra_dc_commit(dc);

	}



	err = tegra_dsi_wait_idle(dsi, 100);

drivers/gpu/drm/tegra/hdmi.c

+2 −4
Original line number Diff line number Diff line
@@ -997,8 +997,7 @@ static int tegra_output_hdmi_enable(struct tegra_output *output) 
		 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE;

	tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);



	tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

	tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);

	tegra_dc_commit(dc);



	/* TODO: add HDCP support */
@@ -1042,8 +1041,7 @@ static int tegra_output_hdmi_disable(struct tegra_output *output) 
		value &= ~HDMI_ENABLE;

		tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);



		tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

		tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);

		tegra_dc_commit(dc);

	}



	clk_disable_unprepare(hdmi->clk);

drivers/gpu/drm/tegra/rgb.c

+3 −5
Original line number Diff line number Diff line
@@ -123,8 +123,7 @@ static int tegra_output_rgb_enable(struct tegra_output *output) 
		 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE;

	tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_POWER_CONTROL);



	tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

	tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);

	tegra_dc_commit(rgb->dc);



	rgb->enabled = true;
@@ -148,11 +147,10 @@ static int tegra_output_rgb_disable(struct tegra_output *output) 
	value &= ~DISP_CTRL_MODE_MASK;

	tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_COMMAND);



	tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

	tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);



	tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable));



	tegra_dc_commit(rgb->dc);



	rgb->enabled = false;



	return 0;