Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 625227a4 authored by Qipan Li's avatar Qipan Li Committed by Mark Brown
Browse files

spi: sirf: set SPI controller in RISC IO chipselect mode 



SPI bitbang supply "chipselect" interface for change chip-select line
, in the SiRFSoC SPI controller, we need to enable "SPI_CS_IO_MODE",
otherwise, spi_sirfsoc_chipselect() has no effect.
now the driver is working is because SPI controller will control CS
automatically without SPI_CS_IO_MODE. this patch makes the CS controller
really controlled by software.

Signed-off-by: default avatarQipan Li <Qipan.Li@csr.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 818e9162

drivers/spi/spi-sirf.c

+5 −0
Original line number Original line Diff line number Diff line
@@ -559,6 +559,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t) 
		regval &= ~SIRFSOC_SPI_CMD_MODE;

		regval &= ~SIRFSOC_SPI_CMD_MODE;

		sspi->tx_by_cmd = false;

		sspi->tx_by_cmd = false;

	}

	}

	/*

	 * set spi controller in RISC chipselect mode, we are controlling CS by

	 * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.

	 */

	regval |= SIRFSOC_SPI_CS_IO_MODE;

	writel(regval, sspi->base + SIRFSOC_SPI_CTRL);

	writel(regval, sspi->base + SIRFSOC_SPI_CTRL);





	if (IS_DMA_VALID(t)) {

	if (IS_DMA_VALID(t)) {