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Commit 60f975b9 authored by Stephen Warren's avatar Stephen Warren
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ARM: tegra: reparent sclk to pll_c_out1



pll_p_out4 needs to be used for other purposes. Reparent sclk so that
it runs from pll_c. Change sclk's rate to 120MHz from 108MHz since this
is the lowest precise rate that can be achieved by dividing the pll_c
rate without reducing the sclk rate. (600/5=120, 600/5.5=109.0909...,
600/6=100).

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent c8b62ab4
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