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Commit 60e5cb79 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv17/fence: split from nv10 code 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent bba9852f

drivers/gpu/drm/nouveau/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -207,7 +207,8 @@ nouveau-y += nouveau_drm.o nouveau_chan.o nouveau_dma.o nouveau_fence.o 
nouveau-y += nouveau_irq.o nouveau_vga.o nouveau_agp.o

nouveau-y += nouveau_ttm.o nouveau_sgdma.o nouveau_bo.o nouveau_gem.o

nouveau-y += nouveau_prime.o nouveau_abi16.o

nouveau-y += nv04_fence.o nv10_fence.o nv50_fence.o nv84_fence.o nvc0_fence.o

nouveau-y += nv04_fence.o nv10_fence.o nv17_fence.o

nouveau-y += nv50_fence.o nv84_fence.o nvc0_fence.o



# drm/kms

nouveau-y += nouveau_bios.o nouveau_fbcon.o nouveau_display.o

drivers/gpu/drm/nouveau/nouveau_drm.c

+2 −1
Original line number Diff line number Diff line
@@ -160,7 +160,8 @@ nouveau_accel_init(struct nouveau_drm *drm) 


	/* initialise synchronisation routines */

	if      (device->card_type < NV_10) ret = nv04_fence_create(drm);

	else if (device->card_type < NV_50) ret = nv10_fence_create(drm);

	else if (device->chipset   <  0x17) ret = nv10_fence_create(drm);

	else if (device->card_type < NV_50) ret = nv17_fence_create(drm);

	else if (device->chipset   <  0x84) ret = nv50_fence_create(drm);

	else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);

	else                                ret = nvc0_fence_create(drm);

drivers/gpu/drm/nouveau/nouveau_fence.h

+2 −0
Original line number Diff line number Diff line
@@ -65,6 +65,8 @@ u32 nv10_fence_read(struct nouveau_channel *); 
void nv10_fence_context_del(struct nouveau_channel *);

void nv10_fence_destroy(struct nouveau_drm *);

int  nv10_fence_create(struct nouveau_drm *);



int  nv17_fence_create(struct nouveau_drm *);

void nv17_fence_resume(struct nouveau_drm *drm);



int nv50_fence_create(struct nouveau_drm *);

drivers/gpu/drm/nouveau/nv10_fence.c

+3 −96
Original line number Diff line number Diff line
@@ -50,45 +50,6 @@ nv10_fence_sync(struct nouveau_fence *fence, 
	return -ENODEV;

}



int

nv17_fence_sync(struct nouveau_fence *fence,

		struct nouveau_channel *prev, struct nouveau_channel *chan)

{

	struct nv10_fence_priv *priv = chan->drm->fence;

	u32 value;

	int ret;



	if (!mutex_trylock(&prev->cli->mutex))

		return -EBUSY;



	spin_lock(&priv->lock);

	value = priv->sequence;

	priv->sequence += 2;

	spin_unlock(&priv->lock);



	ret = RING_SPACE(prev, 5);

	if (!ret) {

		BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);

		OUT_RING  (prev, NvSema);

		OUT_RING  (prev, 0);

		OUT_RING  (prev, value + 0);

		OUT_RING  (prev, value + 1);

		FIRE_RING (prev);

	}



	if (!ret && !(ret = RING_SPACE(chan, 5))) {

		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);

		OUT_RING  (chan, NvSema);

		OUT_RING  (chan, 0);

		OUT_RING  (chan, value + 1);

		OUT_RING  (chan, value + 2);

		FIRE_RING (chan);

	}



	mutex_unlock(&prev->cli->mutex);

	return 0;

}



u32

nv10_fence_read(struct nouveau_channel *chan)

{
@@ -104,39 +65,17 @@ nv10_fence_context_del(struct nouveau_channel *chan) 
	kfree(fctx);

}



static int

int

nv10_fence_context_new(struct nouveau_channel *chan)

{

	struct nv10_fence_priv *priv = chan->drm->fence;

	struct nv10_fence_chan *fctx;

	int ret = 0;



	fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);

	if (!fctx)

		return -ENOMEM;



	nouveau_fence_context_new(&fctx->base);



	if (priv->bo) {

		struct ttm_mem_reg *mem = &priv->bo->bo.mem;

		struct nouveau_object *object;

		u32 start = mem->start * PAGE_SIZE;

		u32 limit = mem->start + mem->size - 1;



		ret = nouveau_object_new(nv_object(chan->cli), chan->handle,

					 NvSema, 0x0002,

					 &(struct nv_dma_class) {

						.flags = NV_DMA_TARGET_VRAM |

							 NV_DMA_ACCESS_RDWR,

						.start = start,

						.limit = limit,

					 }, sizeof(struct nv_dma_class),

					 &object);

	}



	if (ret)

		nv10_fence_context_del(chan);

	return ret;

	return 0;

}



void
@@ -151,18 +90,10 @@ nv10_fence_destroy(struct nouveau_drm *drm) 
	kfree(priv);

}



void nv17_fence_resume(struct nouveau_drm *drm)

{

	struct nv10_fence_priv *priv = drm->fence;



	nouveau_bo_wr32(priv->bo, 0, priv->sequence);

}



int

nv10_fence_create(struct nouveau_drm *drm)

{

	struct nv10_fence_priv *priv;

	int ret = 0;



	priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);

	if (!priv)
@@ -175,29 +106,5 @@ nv10_fence_create(struct nouveau_drm *drm) 
	priv->base.read = nv10_fence_read;

	priv->base.sync = nv10_fence_sync;

	spin_lock_init(&priv->lock);



	if (nv_device(drm->device)->chipset >= 0x17) {

		ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,

				     0, 0x0000, NULL, &priv->bo);

		if (!ret) {

			ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);

			if (!ret) {

				ret = nouveau_bo_map(priv->bo);

				if (ret)

					nouveau_bo_unpin(priv->bo);

			}

			if (ret)

				nouveau_bo_ref(NULL, &priv->bo);

		}



		if (ret == 0) {

			nouveau_bo_wr32(priv->bo, 0x000, 0x00000000);

			priv->base.sync = nv17_fence_sync;

			priv->base.resume = nv17_fence_resume;

		}

	}



	if (ret)

		nv10_fence_destroy(drm);

	return ret;

	return 0;

}

drivers/gpu/drm/nouveau/nv17_fence.c

0 → 100644
+149 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2012 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs <bskeggs@redhat.com>

 */



#include <core/object.h>

#include <core/class.h>



#include "nouveau_drm.h"

#include "nouveau_dma.h"

#include "nv10_fence.h"



int

nv17_fence_sync(struct nouveau_fence *fence,

		struct nouveau_channel *prev, struct nouveau_channel *chan)

{

	struct nv10_fence_priv *priv = chan->drm->fence;

	u32 value;

	int ret;



	if (!mutex_trylock(&prev->cli->mutex))

		return -EBUSY;



	spin_lock(&priv->lock);

	value = priv->sequence;

	priv->sequence += 2;

	spin_unlock(&priv->lock);



	ret = RING_SPACE(prev, 5);

	if (!ret) {

		BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);

		OUT_RING  (prev, NvSema);

		OUT_RING  (prev, 0);

		OUT_RING  (prev, value + 0);

		OUT_RING  (prev, value + 1);

		FIRE_RING (prev);

	}



	if (!ret && !(ret = RING_SPACE(chan, 5))) {

		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);

		OUT_RING  (chan, NvSema);

		OUT_RING  (chan, 0);

		OUT_RING  (chan, value + 1);

		OUT_RING  (chan, value + 2);

		FIRE_RING (chan);

	}



	mutex_unlock(&prev->cli->mutex);

	return 0;

}



static int

nv17_fence_context_new(struct nouveau_channel *chan)

{

	struct nv10_fence_priv *priv = chan->drm->fence;

	struct nv10_fence_chan *fctx;

	struct ttm_mem_reg *mem = &priv->bo->bo.mem;

	struct nouveau_object *object;

	u32 start = mem->start * PAGE_SIZE;

	u32 limit = mem->start + mem->size - 1;

	int ret = 0;



	fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);

	if (!fctx)

		return -ENOMEM;



	nouveau_fence_context_new(&fctx->base);



	ret = nouveau_object_new(nv_object(chan->cli), chan->handle,

				 NvSema, 0x0002,

				 &(struct nv_dma_class) {

					.flags = NV_DMA_TARGET_VRAM |

						 NV_DMA_ACCESS_RDWR,

					.start = start,

					.limit = limit,

				 }, sizeof(struct nv_dma_class),

				 &object);

	if (ret)

		nv10_fence_context_del(chan);

	return ret;

}



void

nv17_fence_resume(struct nouveau_drm *drm)

{

	struct nv10_fence_priv *priv = drm->fence;



	nouveau_bo_wr32(priv->bo, 0, priv->sequence);

}



int

nv17_fence_create(struct nouveau_drm *drm)

{

	struct nv10_fence_priv *priv;

	int ret = 0;



	priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);

	if (!priv)

		return -ENOMEM;



	priv->base.dtor = nv10_fence_destroy;

	priv->base.resume = nv17_fence_resume;

	priv->base.context_new = nv17_fence_context_new;

	priv->base.context_del = nv10_fence_context_del;

	priv->base.emit = nv10_fence_emit;

	priv->base.read = nv10_fence_read;

	priv->base.sync = nv17_fence_sync;

	spin_lock_init(&priv->lock);



	ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,

			     0, 0x0000, NULL, &priv->bo);

	if (!ret) {

		ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);

		if (!ret) {

			ret = nouveau_bo_map(priv->bo);

			if (ret)

				nouveau_bo_unpin(priv->bo);

		}

		if (ret)

			nouveau_bo_ref(NULL, &priv->bo);

	}



	if (ret) {

		nv10_fence_destroy(drm);

		return ret;

	}



	nouveau_bo_wr32(priv->bo, 0x000, 0x00000000);

	return ret;

}