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Commit 60d2ba56 authored by George Shen's avatar George Shen
Browse files

msm: kgsl: update SP clock gating setting 



Fix SP clock incorrectly gated in shader bypass.

CRs-Fixed: 2062271
Change-Id: Iad651e59c829970a9e90a18d715dea9863bf87a5
Signed-off-by: default avatarGeorge Shen <sqiao@codeaurora.org>
parent 11f73a0c

drivers/gpu/msm/adreno_a6xx.c

+4 −4
Original line number Diff line number Diff line
@@ -64,10 +64,10 @@ static const struct kgsl_hwcg_reg a630_hwcg_regs[] = { 
	{A6XX_RBBM_CLOCK_CNTL_SP1, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL_SP2, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL_SP3, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL2_SP0, 0x02222220},

	{A6XX_RBBM_CLOCK_CNTL2_SP1, 0x02222220},

	{A6XX_RBBM_CLOCK_CNTL2_SP2, 0x02222220},

	{A6XX_RBBM_CLOCK_CNTL2_SP3, 0x02222220},

	{A6XX_RBBM_CLOCK_CNTL2_SP0, 0x02022220},

	{A6XX_RBBM_CLOCK_CNTL2_SP1, 0x02022220},

	{A6XX_RBBM_CLOCK_CNTL2_SP2, 0x02022220},

	{A6XX_RBBM_CLOCK_CNTL2_SP3, 0x02022220},

	{A6XX_RBBM_CLOCK_DELAY_SP0, 0x0000F3CF},

	{A6XX_RBBM_CLOCK_DELAY_SP1, 0x0000F3CF},

	{A6XX_RBBM_CLOCK_DELAY_SP2, 0x0000F3CF},