Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 60902a2c authored by Sudhakar Rajashekhara's avatar Sudhakar Rajashekhara Committed by Kevin Hilman
Browse files

davinci: EDMA: multiple CCs, channel mapping and API changes 



- restructure to support multiple channel controllers by using
  additional struct resources for each CC

- interface changes visible to EDMA clients

  Introduce macros to build IDs from controller and channel number,
  and to extract them. Modify the edma_alloc_slot function to take an
  extra argument for the controller.

  Also update ASoC drivers to use API.  ASoC changes
  Acked-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>

- Move queue related mappings to dm<soc>.c

  EDMA in DM355 and DM644x has two transfer controllers while DM646x
  has four transfer controllers. Moving the queue to tc mapping and
  queue priority mapping to dm<soc>.c will be helpful to probe these
  mappings from platform device so that the machine_is_* testing will
  be avoided.

- add channel mapping logic

  Channel mapping logic is introduced in dm646x EDMA. This implies
  that there is no fixed association for a channel number to a
  parameter entry number. In other words, using the DMA channel
  mapping registers (DCHMAPn), a PaRAM entry can be mapped to any
  channel. While in the case of dm644x and dm355 there is a fixed
  mapping between the EDMA channel and Param entry number.

Signed-off-by: default avatarNaresh Medisetty <naresh@ti.com>
Signed-off-by: default avatarSudhakar Rajashekhara <sudhakar.raj@ti.com>
Reviewed-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 4c5adde7

arch/arm/mach-davinci/devices.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -82,10 +82,10 @@ static struct resource mmcsd0_resources[] = { 
	},

	},

	/* DMA channels: RX, then TX */

	/* DMA channels: RX, then TX */

	{

	{

		.start = DAVINCI_DMA_MMCRXEVT,

		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),

		.flags = IORESOURCE_DMA,

		.flags = IORESOURCE_DMA,

	}, {

	}, {

		.start = DAVINCI_DMA_MMCTXEVT,

		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),

		.flags = IORESOURCE_DMA,

		.flags = IORESOURCE_DMA,

	},

	},

};

};
@@ -119,10 +119,10 @@ static struct resource mmcsd1_resources[] = { 
	},

	},

	/* DMA channels: RX, then TX */

	/* DMA channels: RX, then TX */

	{

	{

		.start = 30,	/* rx */

		.start = EDMA_CTLR_CHAN(0, 30),	/* rx */

		.flags = IORESOURCE_DMA,

		.flags = IORESOURCE_DMA,

	}, {

	}, {

		.start = 31,	/* tx */

		.start = EDMA_CTLR_CHAN(0, 31),	/* tx */

		.flags = IORESOURCE_DMA,

		.flags = IORESOURCE_DMA,

	},

	},

};

};

arch/arm/mach-davinci/dm355.c

+32 −9
Original line number Original line Diff line number Diff line
@@ -558,17 +558,38 @@ static const s8 dma_chan_dm355_no_event[] = { 
	-1

	-1

};

};





static struct edma_soc_info dm355_edma_info = {

static const s8

queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{-1, -1},

};



static const s8

queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	{0, 3},

	{1, 7},

	{-1, -1},

};



static struct edma_soc_info dm355_edma_info[] = {

	{

		.n_channel		= 64,

		.n_channel		= 64,

		.n_region		= 4,

		.n_region		= 4,

		.n_slot			= 128,

		.n_slot			= 128,

		.n_tc			= 2,

		.n_tc			= 2,

		.n_cc			= 1,

		.noevent		= dma_chan_dm355_no_event,

		.noevent		= dma_chan_dm355_no_event,

		.queue_tc_mapping	= queue_tc_mapping,

		.queue_priority_mapping	= queue_priority_mapping,

	},

};

};





static struct resource edma_resources[] = {

static struct resource edma_resources[] = {

	{

	{

		.name	= "edma_cc",

		.name	= "edma_cc0",

		.start	= 0x01c00000,

		.start	= 0x01c00000,

		.end	= 0x01c00000 + SZ_64K - 1,

		.end	= 0x01c00000 + SZ_64K - 1,

		.flags	= IORESOURCE_MEM,

		.flags	= IORESOURCE_MEM,
@@ -586,10 +607,12 @@ static struct resource edma_resources[] = { 
		.flags	= IORESOURCE_MEM,

		.flags	= IORESOURCE_MEM,

	},

	},

	{

	{

		.name	= "edma0",

		.start	= IRQ_CCINT0,

		.start	= IRQ_CCINT0,

		.flags	= IORESOURCE_IRQ,

		.flags	= IORESOURCE_IRQ,

	},

	},

	{

	{

		.name	= "edma0_err",

		.start	= IRQ_CCERRINT,

		.start	= IRQ_CCERRINT,

		.flags	= IORESOURCE_IRQ,

		.flags	= IORESOURCE_IRQ,

	},

	},
@@ -598,8 +621,8 @@ static struct resource edma_resources[] = { 




static struct platform_device dm355_edma_device = {

static struct platform_device dm355_edma_device = {

	.name			= "edma",

	.name			= "edma",

	.id			= -1,

	.id			= 0,

	.dev.platform_data	= &dm355_edma_info,

	.dev.platform_data	= dm355_edma_info,

	.num_resources		= ARRAY_SIZE(edma_resources),

	.num_resources		= ARRAY_SIZE(edma_resources),

	.resource		= edma_resources,

	.resource		= edma_resources,

};

};

arch/arm/mach-davinci/dm644x.c

+32 −9
Original line number Original line Diff line number Diff line
@@ -484,17 +484,38 @@ static const s8 dma_chan_dm644x_no_event[] = { 
	-1

	-1

};

};





static struct edma_soc_info dm644x_edma_info = {

static const s8

queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{-1, -1},

};



static const s8

queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	{0, 3},

	{1, 7},

	{-1, -1},

};



static struct edma_soc_info dm644x_edma_info[] = {

	{

		.n_channel		= 64,

		.n_channel		= 64,

		.n_region		= 4,

		.n_region		= 4,

		.n_slot			= 128,

		.n_slot			= 128,

		.n_tc			= 2,

		.n_tc			= 2,

		.n_cc			= 1,

		.noevent		= dma_chan_dm644x_no_event,

		.noevent		= dma_chan_dm644x_no_event,

		.queue_tc_mapping	= queue_tc_mapping,

		.queue_priority_mapping	= queue_priority_mapping,

	},

};

};





static struct resource edma_resources[] = {

static struct resource edma_resources[] = {

	{

	{

		.name	= "edma_cc",

		.name	= "edma_cc0",

		.start	= 0x01c00000,

		.start	= 0x01c00000,

		.end	= 0x01c00000 + SZ_64K - 1,

		.end	= 0x01c00000 + SZ_64K - 1,

		.flags	= IORESOURCE_MEM,

		.flags	= IORESOURCE_MEM,
@@ -512,10 +533,12 @@ static struct resource edma_resources[] = { 
		.flags	= IORESOURCE_MEM,

		.flags	= IORESOURCE_MEM,

	},

	},

	{

	{

		.name	= "edma0",

		.start	= IRQ_CCINT0,

		.start	= IRQ_CCINT0,

		.flags	= IORESOURCE_IRQ,

		.flags	= IORESOURCE_IRQ,

	},

	},

	{

	{

		.name	= "edma0_err",

		.start	= IRQ_CCERRINT,

		.start	= IRQ_CCERRINT,

		.flags	= IORESOURCE_IRQ,

		.flags	= IORESOURCE_IRQ,

	},

	},
@@ -524,8 +547,8 @@ static struct resource edma_resources[] = { 




static struct platform_device dm644x_edma_device = {

static struct platform_device dm644x_edma_device = {

	.name			= "edma",

	.name			= "edma",

	.id			= -1,

	.id			= 0,

	.dev.platform_data	= &dm644x_edma_info,

	.dev.platform_data	= dm644x_edma_info,

	.num_resources		= ARRAY_SIZE(edma_resources),

	.num_resources		= ARRAY_SIZE(edma_resources),

	.resource		= edma_resources,

	.resource		= edma_resources,

};

};

arch/arm/mach-davinci/dm646x.c

+37 −9
Original line number Original line Diff line number Diff line
@@ -451,17 +451,43 @@ static const s8 dma_chan_dm646x_no_event[] = { 
	-1

	-1

};

};





static struct edma_soc_info dm646x_edma_info = {

/* Four Transfer Controllers on DM646x */

static const s8

dm646x_queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{2, 2},

	{3, 3},

	{-1, -1},

};



static const s8

dm646x_queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	{0, 4},

	{1, 0},

	{2, 5},

	{3, 1},

	{-1, -1},

};



static struct edma_soc_info dm646x_edma_info[] = {

	{

		.n_channel		= 64,

		.n_channel		= 64,

		.n_region		= 6,	/* 0-1, 4-7 */

		.n_region		= 6,	/* 0-1, 4-7 */

		.n_slot			= 512,

		.n_slot			= 512,

		.n_tc			= 4,

		.n_tc			= 4,

		.n_cc			= 1,

		.noevent		= dma_chan_dm646x_no_event,

		.noevent		= dma_chan_dm646x_no_event,

		.queue_tc_mapping	= dm646x_queue_tc_mapping,

		.queue_priority_mapping	= dm646x_queue_priority_mapping,

	},

};

};





static struct resource edma_resources[] = {

static struct resource edma_resources[] = {

	{

	{

		.name	= "edma_cc",

		.name	= "edma_cc0",

		.start	= 0x01c00000,

		.start	= 0x01c00000,

		.end	= 0x01c00000 + SZ_64K - 1,

		.end	= 0x01c00000 + SZ_64K - 1,

		.flags	= IORESOURCE_MEM,

		.flags	= IORESOURCE_MEM,
@@ -491,10 +517,12 @@ static struct resource edma_resources[] = { 
		.flags	= IORESOURCE_MEM,

		.flags	= IORESOURCE_MEM,

	},

	},

	{

	{

		.name	= "edma0",

		.start	= IRQ_CCINT0,

		.start	= IRQ_CCINT0,

		.flags	= IORESOURCE_IRQ,

		.flags	= IORESOURCE_IRQ,

	},

	},

	{

	{

		.name	= "edma0_err",

		.start	= IRQ_CCERRINT,

		.start	= IRQ_CCERRINT,

		.flags	= IORESOURCE_IRQ,

		.flags	= IORESOURCE_IRQ,

	},

	},
@@ -503,8 +531,8 @@ static struct resource edma_resources[] = { 




static struct platform_device dm646x_edma_device = {

static struct platform_device dm646x_edma_device = {

	.name			= "edma",

	.name			= "edma",

	.id			= -1,

	.id			= 0,

	.dev.platform_data	= &dm646x_edma_info,

	.dev.platform_data	= dm646x_edma_info,

	.num_resources		= ARRAY_SIZE(edma_resources),

	.num_resources		= ARRAY_SIZE(edma_resources),

	.resource		= edma_resources,

	.resource		= edma_resources,

};

};