Merge "msm: ep_pcie: Configure TCSR for PERST_EN" (5ff388b6) · Commits · e / devices / android_kernel_fairphone_FP3

Documentation/devicetree/bindings/pci/msm_ep_pcie.txt

+7 −3

Original line number	Diff line number	Diff line
		@@ -4,7 +4,8 @@ Required properties:
		- compatible: should be "qcom,pcie-ep".
		- reg: should contain PCIe register maps.
		- reg-names: indicates various resources passed to driver by name.
		Should be "msi", "dm_core", "elbi", "parf", "phy", "mmio".
		Should be "msi", "dm_core", "elbi", "parf", "phy", "mmio",
		"tcsr_pcie_perst_en".
		These correspond to different modules within the PCIe domain.
		- #address-cells: Should provide a value of 0.
		- interrupt-parent: Should be the PCIe device node itself here.
		@@ -77,8 +78,11 @@ Example:
		<0xbffff000 0x1000>,
		<0xfc520000 0x2000>,
		<0xfc526000 0x1000>,
		<0xfc527000 0x1000>;
		reg-names = "msi", "dm_core", "elbi", "parf", "phy", "mmio";
		<0xfc527000 0x1000>,
		<0x01fcb000 0x1000>;

		reg-names = "msi", "dm_core", "elbi", "parf", "phy", "mmio",
		"tcsr_pcie_perst";

		#address-cells = <0>;
		interrupt-parent = <&pcie_ep>;

drivers/platform/msm/ep_pcie/ep_pcie_com.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -234,6 +234,7 @@ enum ep_pcie_res {
		EP_PCIE_RES_DM_CORE,
		EP_PCIE_RES_ELBI,
		EP_PCIE_RES_IATU,
		EP_PCIE_RES_TCSR_PERST,
		EP_PCIE_MAX_RES,
		};

		@@ -325,6 +326,7 @@ struct ep_pcie_dev_t {
		void __iomem *dm_core;
		void __iomem *elbi;
		void __iomem *iatu;
		void __iomem *tcsr_perst_en;

		struct msm_bus_scale_pdata *bus_scale_table;
		u32 bus_client;

drivers/platform/msm/ep_pcie/ep_pcie_core.c

+26 −0

Original line number	Diff line number	Diff line
		@@ -91,6 +91,7 @@ static const struct ep_pcie_res_info_t ep_pcie_res_info[EP_PCIE_MAX_RES] = {
		{"dm_core", NULL, NULL},
		{"elbi", NULL, NULL},
		{"iatu", NULL, NULL},
		{"tcsr_pcie_perst_en", NULL, NULL},
		};

		static const struct ep_pcie_irq_info_t ep_pcie_irq_info[EP_PCIE_MAX_IRQ] = {
		@@ -527,6 +528,8 @@ static void ep_pcie_bar_init(struct ep_pcie_dev_t *dev)

		static void ep_pcie_config_mmio(struct ep_pcie_dev_t *dev)
		{
		u32 mhi_status;

		EP_PCIE_DBG(dev,
		"Initial version of MMIO is:0x%x\n",
		readl_relaxed(dev->mmio + PCIE20_MHIVER));
		@@ -538,6 +541,14 @@ static void ep_pcie_config_mmio(struct ep_pcie_dev_t *dev)
		return;
		}

		mhi_status = readl_relaxed(dev->mmio + PCIE20_MHISTATUS);
		if (mhi_status & BIT(2)) {
		EP_PCIE_DBG(dev,
		"MHISYS error is set:%d, proceed to MHI\n",
		mhi_status);
		return;
		}

		ep_pcie_write_reg(dev->mmio, PCIE20_MHICFG, 0x02800880);
		ep_pcie_write_reg(dev->mmio, PCIE20_BHI_EXECENV, 0x2);
		ep_pcie_write_reg(dev->mmio, PCIE20_MHICTRL, 0x0);
		@@ -1219,6 +1230,7 @@ static int ep_pcie_get_resources(struct ep_pcie_dev_t *dev,
		dev->dm_core = dev->res[EP_PCIE_RES_DM_CORE].base;
		dev->elbi = dev->res[EP_PCIE_RES_ELBI].base;
		dev->iatu = dev->res[EP_PCIE_RES_IATU].base;
		dev->tcsr_perst_en = dev->res[EP_PCIE_RES_TCSR_PERST].base;

		out:
		kfree(clkfreq);
		@@ -1388,6 +1400,20 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt)
		if (!(opt & EP_PCIE_OPT_ENUM))
		goto out;

		EP_PCIE_DBG(dev,
		"TCSR PERST_EN value before configure:0x%x\n",
		readl_relaxed(dev->tcsr_perst_en + 0x258));

		/*
		* Delatch PERST_EN with TCSR to avoid device reset
		* during host reboot case.
		*/
		writel_relaxed(0, dev->tcsr_perst_en + 0x258);

		EP_PCIE_DBG(dev,
		"TCSR PERST_EN value after configure:0x%x\n",
		readl_relaxed(dev->tcsr_perst_en));

		if (opt & EP_PCIE_OPT_AST_WAKE) {
		/* assert PCIe WAKE# */
		EP_PCIE_INFO(dev, "PCIe V%d: assert PCIe WAKE#.\n",