Loading drivers/usb/dwc3/dwc3-msm.c +27 −48 Original line number Original line Diff line number Diff line Loading @@ -198,6 +198,13 @@ static const struct usb_irq usb_irq_info[USB_MAX_IRQ] = { {"ss_phy_irq", 0}, {"ss_phy_irq", 0}, }; }; static const char * const gsi_op_strings[] = { "EP_CONFIG", "START_XFER", "STORE_DBL_INFO", "ENABLE_GSI", "UPDATE_XFER", "RING_DB", "END_XFER", "GET_CH_INFO", "GET_XFER_IDX", "PREPARE_TRBS", "FREE_TRBS", "SET_CLR_BLOCK_DBL", "CHECK_FOR_SUSP", "EP_DISABLE" }; /* Input bits to state machine (mdwc->inputs) */ /* Input bits to state machine (mdwc->inputs) */ #define ID 0 #define ID 0 Loading Loading @@ -394,34 +401,9 @@ static inline void dwc3_msm_write_reg_field(void __iomem *base, u32 offset, tmp &= ~mask; /* clear written bits */ tmp &= ~mask; /* clear written bits */ val = tmp | (val << shift); val = tmp | (val << shift); iowrite32(val, base + offset); iowrite32(val, base + offset); } /** * Write register and read back masked value to confirm it is written * * @base - DWC3 base virtual address. * @offset - register offset. * @mask - register bitmask specifying what should be updated * @val - value to write. * */ static inline void dwc3_msm_write_readback(void __iomem *base, u32 offset, const u32 mask, u32 val) { u32 write_val, tmp = ioread32(base + offset); tmp &= ~mask; /* retain other bits */ write_val = tmp | val; iowrite32(write_val, base + offset); /* Read back to see if val was written */ tmp = ioread32(base + offset); tmp &= mask; /* clear other bits */ if (tmp != val) /* Read back to make sure that previous write goes through */ pr_err("%s: write: %x to QSCRATCH: %x FAILED\n", ioread32(base + offset); __func__, val, offset); } } static bool dwc3_msm_is_ss_rhport_connected(struct dwc3_msm *mdwc) static bool dwc3_msm_is_ss_rhport_connected(struct dwc3_msm *mdwc) Loading Loading @@ -1032,8 +1014,13 @@ static void gsi_ring_db(struct usb_ep *ep, struct usb_gsi_request *request) &offset, gsi_dbl_address_lsb, request->db_reg_phs_addr_lsb, &offset, gsi_dbl_address_lsb, request->db_reg_phs_addr_lsb, ep->name); ep->name); dbg_log_string("ep:%s link TRB addr:%pa db:%x\n", ep->name, &offset, request->db_reg_phs_addr_lsb); writel_relaxed(offset, gsi_dbl_address_lsb); writel_relaxed(offset, gsi_dbl_address_lsb); readl_relaxed(gsi_dbl_address_lsb); writel_relaxed(0, gsi_dbl_address_msb); writel_relaxed(0, gsi_dbl_address_msb); readl_relaxed(gsi_dbl_address_msb); } } /* /* Loading Loading @@ -1393,6 +1380,13 @@ static bool gsi_check_ready_to_suspend(struct usb_ep *ep, bool f_suspend) return true; return true; } } static inline const char *gsi_op_to_string(unsigned int op) { if (op < ARRAY_SIZE(gsi_op_strings)) return gsi_op_strings[op]; return "Invalid"; } /** /** * Performs GSI operations or GSI EP related operations. * Performs GSI operations or GSI EP related operations. Loading @@ -1416,41 +1410,36 @@ static int dwc3_msm_gsi_ep_op(struct usb_ep *ep, bool block_db, f_suspend; bool block_db, f_suspend; unsigned long flags; unsigned long flags; dbg_log_string("%s(%d):%s", ep->name, ep->ep_num, gsi_op_to_string(op)); switch (op) { switch (op) { case GSI_EP_OP_PREPARE_TRBS: case GSI_EP_OP_PREPARE_TRBS: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_PREPARE_TRBS for %s\n", ep->name); ret = gsi_prepare_trbs(ep, request); ret = gsi_prepare_trbs(ep, request); break; break; case GSI_EP_OP_FREE_TRBS: case GSI_EP_OP_FREE_TRBS: dev_dbg(mdwc->dev, "EP_OP_FREE_TRBS for %s\n", ep->name); request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; gsi_free_trbs(ep, request); gsi_free_trbs(ep, request); break; break; case GSI_EP_OP_CONFIG: case GSI_EP_OP_CONFIG: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_CONFIG for %s\n", ep->name); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); gsi_configure_ep(ep, request); gsi_configure_ep(ep, request); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_STARTXFER: case GSI_EP_OP_STARTXFER: dev_dbg(mdwc->dev, "EP_OP_STARTXFER for %s\n", ep->name); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); ret = gsi_startxfer_for_ep(ep); ret = gsi_startxfer_for_ep(ep); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_GET_XFER_IDX: case GSI_EP_OP_GET_XFER_IDX: dev_dbg(mdwc->dev, "EP_OP_GET_XFER_IDX for %s\n", ep->name); ret = gsi_get_xfer_index(ep); ret = gsi_get_xfer_index(ep); break; break; case GSI_EP_OP_STORE_DBL_INFO: case GSI_EP_OP_STORE_DBL_INFO: dev_dbg(mdwc->dev, "EP_OP_STORE_DBL_INFO\n"); request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; gsi_store_ringbase_dbl_info(ep, request); gsi_store_ringbase_dbl_info(ep, request); break; break; case GSI_EP_OP_ENABLE_GSI: case GSI_EP_OP_ENABLE_GSI: dev_dbg(mdwc->dev, "EP_OP_ENABLE_GSI\n"); gsi_enable(ep); gsi_enable(ep); break; break; case GSI_EP_OP_GET_CH_INFO: case GSI_EP_OP_GET_CH_INFO: Loading @@ -1459,36 +1448,29 @@ static int dwc3_msm_gsi_ep_op(struct usb_ep *ep, break; break; case GSI_EP_OP_RING_DB: case GSI_EP_OP_RING_DB: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dbg_print(0xFF, "RING_DB", 0, ep->name); gsi_ring_db(ep, request); gsi_ring_db(ep, request); break; break; case GSI_EP_OP_UPDATEXFER: case GSI_EP_OP_UPDATEXFER: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_UPDATEXFER\n"); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); ret = gsi_updatexfer_for_ep(ep, request); ret = gsi_updatexfer_for_ep(ep, request); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_ENDXFER: case GSI_EP_OP_ENDXFER: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_ENDXFER for %s\n", ep->name); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); gsi_endxfer_for_ep(ep); gsi_endxfer_for_ep(ep); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_SET_CLR_BLOCK_DBL: case GSI_EP_OP_SET_CLR_BLOCK_DBL: block_db = *((bool *)op_data); block_db = *((bool *)op_data); dev_dbg(mdwc->dev, "EP_OP_SET_CLR_BLOCK_DBL %d\n", block_db); gsi_set_clear_dbell(ep, block_db); gsi_set_clear_dbell(ep, block_db); break; break; case GSI_EP_OP_CHECK_FOR_SUSPEND: case GSI_EP_OP_CHECK_FOR_SUSPEND: dev_dbg(mdwc->dev, "EP_OP_CHECK_FOR_SUSPEND\n"); f_suspend = *((bool *)op_data); f_suspend = *((bool *)op_data); ret = gsi_check_ready_to_suspend(ep, f_suspend); ret = gsi_check_ready_to_suspend(ep, f_suspend); break; break; case GSI_EP_OP_DISABLE: case GSI_EP_OP_DISABLE: dev_dbg(mdwc->dev, "EP_OP_DISABLE\n"); ret = ep->ops->disable(ep); ret = ep->ops->disable(ep); break; break; default: default: Loading Loading @@ -4156,17 +4138,14 @@ static void dwc3_override_vbus_status(struct dwc3_msm *mdwc, bool vbus_present) struct dwc3 *dwc = platform_get_drvdata(mdwc->dwc3); struct dwc3 *dwc = platform_get_drvdata(mdwc->dwc3); /* Update OTG VBUS Valid from HSPHY to controller */ /* Update OTG VBUS Valid from HSPHY to controller */ dwc3_msm_write_readback(mdwc->base, HS_PHY_CTRL_REG, dwc3_msm_write_reg_field(mdwc->base, HS_PHY_CTRL_REG, vbus_present ? UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL : UTMI_OTG_VBUS_VALID, !!vbus_present); UTMI_OTG_VBUS_VALID, vbus_present ? UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL : 0); /* Update only if Super Speed is supported */ /* Update only if Super Speed is supported */ if (dwc->maximum_speed == USB_SPEED_SUPER) { if (dwc->maximum_speed == USB_SPEED_SUPER) { /* Update VBUS Valid from SSPHY to controller */ /* Update VBUS Valid from SSPHY to controller */ dwc3_msm_write_readback(mdwc->base, SS_PHY_CTRL_REG, dwc3_msm_write_reg_field(mdwc->base, SS_PHY_CTRL_REG, LANE0_PWR_PRESENT, LANE0_PWR_PRESENT, !!vbus_present); vbus_present ? LANE0_PWR_PRESENT : 0); } } } } Loading drivers/usb/dwc3/gadget.c +7 −0 Original line number Original line Diff line number Diff line Loading @@ -745,6 +745,7 @@ static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) { { struct dwc3_request *req; struct dwc3_request *req; dbg_log_string("START for %s(%d)", dep->name, dep->number); dwc3_stop_active_transfer(dwc, dep->number, true); dwc3_stop_active_transfer(dwc, dep->number, true); /* - giveback all requests to gadget driver */ /* - giveback all requests to gadget driver */ Loading @@ -759,6 +760,7 @@ static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) dwc3_gadget_giveback(dep, req, -ESHUTDOWN); dwc3_gadget_giveback(dep, req, -ESHUTDOWN); } } dbg_log_string("DONE for %s(%d)", dep->name, dep->number); } } /** /** Loading Loading @@ -3027,12 +3029,16 @@ void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force) if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) udelay(100); udelay(100); dbg_log_string("%s(%d): endxfer ret:%d)", dep->name, dep->number, ret); } } static void dwc3_stop_active_transfers(struct dwc3 *dwc) static void dwc3_stop_active_transfers(struct dwc3 *dwc) { { u32 epnum; u32 epnum; dbg_log_string("START"); for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) { for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) { struct dwc3_ep *dep; struct dwc3_ep *dep; Loading @@ -3048,6 +3054,7 @@ static void dwc3_stop_active_transfers(struct dwc3 *dwc) DWC3_CONTROLLER_NOTIFY_CLEAR_DB, 0); DWC3_CONTROLLER_NOTIFY_CLEAR_DB, 0); dwc3_remove_requests(dwc, dep); dwc3_remove_requests(dwc, dep); } } dbg_log_string("DONE"); } } static void dwc3_clear_stall_all_ep(struct dwc3 *dwc) static void dwc3_clear_stall_all_ep(struct dwc3 *dwc) Loading Loading
drivers/usb/dwc3/dwc3-msm.c +27 −48 Original line number Original line Diff line number Diff line Loading @@ -198,6 +198,13 @@ static const struct usb_irq usb_irq_info[USB_MAX_IRQ] = { {"ss_phy_irq", 0}, {"ss_phy_irq", 0}, }; }; static const char * const gsi_op_strings[] = { "EP_CONFIG", "START_XFER", "STORE_DBL_INFO", "ENABLE_GSI", "UPDATE_XFER", "RING_DB", "END_XFER", "GET_CH_INFO", "GET_XFER_IDX", "PREPARE_TRBS", "FREE_TRBS", "SET_CLR_BLOCK_DBL", "CHECK_FOR_SUSP", "EP_DISABLE" }; /* Input bits to state machine (mdwc->inputs) */ /* Input bits to state machine (mdwc->inputs) */ #define ID 0 #define ID 0 Loading Loading @@ -394,34 +401,9 @@ static inline void dwc3_msm_write_reg_field(void __iomem *base, u32 offset, tmp &= ~mask; /* clear written bits */ tmp &= ~mask; /* clear written bits */ val = tmp | (val << shift); val = tmp | (val << shift); iowrite32(val, base + offset); iowrite32(val, base + offset); } /** * Write register and read back masked value to confirm it is written * * @base - DWC3 base virtual address. * @offset - register offset. * @mask - register bitmask specifying what should be updated * @val - value to write. * */ static inline void dwc3_msm_write_readback(void __iomem *base, u32 offset, const u32 mask, u32 val) { u32 write_val, tmp = ioread32(base + offset); tmp &= ~mask; /* retain other bits */ write_val = tmp | val; iowrite32(write_val, base + offset); /* Read back to see if val was written */ tmp = ioread32(base + offset); tmp &= mask; /* clear other bits */ if (tmp != val) /* Read back to make sure that previous write goes through */ pr_err("%s: write: %x to QSCRATCH: %x FAILED\n", ioread32(base + offset); __func__, val, offset); } } static bool dwc3_msm_is_ss_rhport_connected(struct dwc3_msm *mdwc) static bool dwc3_msm_is_ss_rhport_connected(struct dwc3_msm *mdwc) Loading Loading @@ -1032,8 +1014,13 @@ static void gsi_ring_db(struct usb_ep *ep, struct usb_gsi_request *request) &offset, gsi_dbl_address_lsb, request->db_reg_phs_addr_lsb, &offset, gsi_dbl_address_lsb, request->db_reg_phs_addr_lsb, ep->name); ep->name); dbg_log_string("ep:%s link TRB addr:%pa db:%x\n", ep->name, &offset, request->db_reg_phs_addr_lsb); writel_relaxed(offset, gsi_dbl_address_lsb); writel_relaxed(offset, gsi_dbl_address_lsb); readl_relaxed(gsi_dbl_address_lsb); writel_relaxed(0, gsi_dbl_address_msb); writel_relaxed(0, gsi_dbl_address_msb); readl_relaxed(gsi_dbl_address_msb); } } /* /* Loading Loading @@ -1393,6 +1380,13 @@ static bool gsi_check_ready_to_suspend(struct usb_ep *ep, bool f_suspend) return true; return true; } } static inline const char *gsi_op_to_string(unsigned int op) { if (op < ARRAY_SIZE(gsi_op_strings)) return gsi_op_strings[op]; return "Invalid"; } /** /** * Performs GSI operations or GSI EP related operations. * Performs GSI operations or GSI EP related operations. Loading @@ -1416,41 +1410,36 @@ static int dwc3_msm_gsi_ep_op(struct usb_ep *ep, bool block_db, f_suspend; bool block_db, f_suspend; unsigned long flags; unsigned long flags; dbg_log_string("%s(%d):%s", ep->name, ep->ep_num, gsi_op_to_string(op)); switch (op) { switch (op) { case GSI_EP_OP_PREPARE_TRBS: case GSI_EP_OP_PREPARE_TRBS: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_PREPARE_TRBS for %s\n", ep->name); ret = gsi_prepare_trbs(ep, request); ret = gsi_prepare_trbs(ep, request); break; break; case GSI_EP_OP_FREE_TRBS: case GSI_EP_OP_FREE_TRBS: dev_dbg(mdwc->dev, "EP_OP_FREE_TRBS for %s\n", ep->name); request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; gsi_free_trbs(ep, request); gsi_free_trbs(ep, request); break; break; case GSI_EP_OP_CONFIG: case GSI_EP_OP_CONFIG: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_CONFIG for %s\n", ep->name); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); gsi_configure_ep(ep, request); gsi_configure_ep(ep, request); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_STARTXFER: case GSI_EP_OP_STARTXFER: dev_dbg(mdwc->dev, "EP_OP_STARTXFER for %s\n", ep->name); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); ret = gsi_startxfer_for_ep(ep); ret = gsi_startxfer_for_ep(ep); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_GET_XFER_IDX: case GSI_EP_OP_GET_XFER_IDX: dev_dbg(mdwc->dev, "EP_OP_GET_XFER_IDX for %s\n", ep->name); ret = gsi_get_xfer_index(ep); ret = gsi_get_xfer_index(ep); break; break; case GSI_EP_OP_STORE_DBL_INFO: case GSI_EP_OP_STORE_DBL_INFO: dev_dbg(mdwc->dev, "EP_OP_STORE_DBL_INFO\n"); request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; gsi_store_ringbase_dbl_info(ep, request); gsi_store_ringbase_dbl_info(ep, request); break; break; case GSI_EP_OP_ENABLE_GSI: case GSI_EP_OP_ENABLE_GSI: dev_dbg(mdwc->dev, "EP_OP_ENABLE_GSI\n"); gsi_enable(ep); gsi_enable(ep); break; break; case GSI_EP_OP_GET_CH_INFO: case GSI_EP_OP_GET_CH_INFO: Loading @@ -1459,36 +1448,29 @@ static int dwc3_msm_gsi_ep_op(struct usb_ep *ep, break; break; case GSI_EP_OP_RING_DB: case GSI_EP_OP_RING_DB: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dbg_print(0xFF, "RING_DB", 0, ep->name); gsi_ring_db(ep, request); gsi_ring_db(ep, request); break; break; case GSI_EP_OP_UPDATEXFER: case GSI_EP_OP_UPDATEXFER: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_UPDATEXFER\n"); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); ret = gsi_updatexfer_for_ep(ep, request); ret = gsi_updatexfer_for_ep(ep, request); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_ENDXFER: case GSI_EP_OP_ENDXFER: request = (struct usb_gsi_request *)op_data; request = (struct usb_gsi_request *)op_data; dev_dbg(mdwc->dev, "EP_OP_ENDXFER for %s\n", ep->name); spin_lock_irqsave(&dwc->lock, flags); spin_lock_irqsave(&dwc->lock, flags); gsi_endxfer_for_ep(ep); gsi_endxfer_for_ep(ep); spin_unlock_irqrestore(&dwc->lock, flags); spin_unlock_irqrestore(&dwc->lock, flags); break; break; case GSI_EP_OP_SET_CLR_BLOCK_DBL: case GSI_EP_OP_SET_CLR_BLOCK_DBL: block_db = *((bool *)op_data); block_db = *((bool *)op_data); dev_dbg(mdwc->dev, "EP_OP_SET_CLR_BLOCK_DBL %d\n", block_db); gsi_set_clear_dbell(ep, block_db); gsi_set_clear_dbell(ep, block_db); break; break; case GSI_EP_OP_CHECK_FOR_SUSPEND: case GSI_EP_OP_CHECK_FOR_SUSPEND: dev_dbg(mdwc->dev, "EP_OP_CHECK_FOR_SUSPEND\n"); f_suspend = *((bool *)op_data); f_suspend = *((bool *)op_data); ret = gsi_check_ready_to_suspend(ep, f_suspend); ret = gsi_check_ready_to_suspend(ep, f_suspend); break; break; case GSI_EP_OP_DISABLE: case GSI_EP_OP_DISABLE: dev_dbg(mdwc->dev, "EP_OP_DISABLE\n"); ret = ep->ops->disable(ep); ret = ep->ops->disable(ep); break; break; default: default: Loading Loading @@ -4156,17 +4138,14 @@ static void dwc3_override_vbus_status(struct dwc3_msm *mdwc, bool vbus_present) struct dwc3 *dwc = platform_get_drvdata(mdwc->dwc3); struct dwc3 *dwc = platform_get_drvdata(mdwc->dwc3); /* Update OTG VBUS Valid from HSPHY to controller */ /* Update OTG VBUS Valid from HSPHY to controller */ dwc3_msm_write_readback(mdwc->base, HS_PHY_CTRL_REG, dwc3_msm_write_reg_field(mdwc->base, HS_PHY_CTRL_REG, vbus_present ? UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL : UTMI_OTG_VBUS_VALID, !!vbus_present); UTMI_OTG_VBUS_VALID, vbus_present ? UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL : 0); /* Update only if Super Speed is supported */ /* Update only if Super Speed is supported */ if (dwc->maximum_speed == USB_SPEED_SUPER) { if (dwc->maximum_speed == USB_SPEED_SUPER) { /* Update VBUS Valid from SSPHY to controller */ /* Update VBUS Valid from SSPHY to controller */ dwc3_msm_write_readback(mdwc->base, SS_PHY_CTRL_REG, dwc3_msm_write_reg_field(mdwc->base, SS_PHY_CTRL_REG, LANE0_PWR_PRESENT, LANE0_PWR_PRESENT, !!vbus_present); vbus_present ? LANE0_PWR_PRESENT : 0); } } } } Loading
drivers/usb/dwc3/gadget.c +7 −0 Original line number Original line Diff line number Diff line Loading @@ -745,6 +745,7 @@ static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) { { struct dwc3_request *req; struct dwc3_request *req; dbg_log_string("START for %s(%d)", dep->name, dep->number); dwc3_stop_active_transfer(dwc, dep->number, true); dwc3_stop_active_transfer(dwc, dep->number, true); /* - giveback all requests to gadget driver */ /* - giveback all requests to gadget driver */ Loading @@ -759,6 +760,7 @@ static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) dwc3_gadget_giveback(dep, req, -ESHUTDOWN); dwc3_gadget_giveback(dep, req, -ESHUTDOWN); } } dbg_log_string("DONE for %s(%d)", dep->name, dep->number); } } /** /** Loading Loading @@ -3027,12 +3029,16 @@ void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force) if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) udelay(100); udelay(100); dbg_log_string("%s(%d): endxfer ret:%d)", dep->name, dep->number, ret); } } static void dwc3_stop_active_transfers(struct dwc3 *dwc) static void dwc3_stop_active_transfers(struct dwc3 *dwc) { { u32 epnum; u32 epnum; dbg_log_string("START"); for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) { for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) { struct dwc3_ep *dep; struct dwc3_ep *dep; Loading @@ -3048,6 +3054,7 @@ static void dwc3_stop_active_transfers(struct dwc3 *dwc) DWC3_CONTROLLER_NOTIFY_CLEAR_DB, 0); DWC3_CONTROLLER_NOTIFY_CLEAR_DB, 0); dwc3_remove_requests(dwc, dep); dwc3_remove_requests(dwc, dep); } } dbg_log_string("DONE"); } } static void dwc3_clear_stall_all_ep(struct dwc3 *dwc) static void dwc3_clear_stall_all_ep(struct dwc3 *dwc) Loading