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Commit 5e79cb29 authored by Minghuan Lian's avatar Minghuan Lian Committed by Marc Zyngier
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dt/bindings: Add bindings for Layerscape SCFG MSI 



Some Layerscape SoCs use a simple MSI controller implementation.
It contains only two SCFG register to trigger and describe a
group 32 MSI interrupts. The patch adds bindings to describe
the controller.

Signed-off-by: default avatarMinghuan Lian <Minghuan.Lian@nxp.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent 287e9357

Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt

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* Freescale Layerscape SCFG PCIe MSI controller



Required properties:



- compatible: should be "fsl,<soc-name>-msi" to identify

	      Layerscape PCIe MSI controller block such as:

              "fsl,1s1021a-msi"

              "fsl,1s1043a-msi"

- msi-controller: indicates that this is a PCIe MSI controller node

- reg: physical base address of the controller and length of memory mapped.

- interrupts: an interrupt to the parent interrupt controller.



Optional properties:

- interrupt-parent: the phandle to the parent interrupt controller.



This interrupt controller hardware is a second level interrupt controller that

is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based

platforms. If interrupt-parent is not provided, the default parent interrupt

controller will be used.

Each PCIe node needs to have property msi-parent that points to

MSI controller node



Examples:



	msi1: msi-controller@1571000 {

		compatible = "fsl,1s1043a-msi";

		reg = <0x0 0x1571000 0x0 0x8>,

		msi-controller;

		interrupts = <0 116 0x4>;

	};