Merge "drm/msm/sde: enable continuous splash" (5e6342d1) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -77,6 +77,7 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl,
		ctrl->ops.reg_dump_to_buffer =
		dsi_ctrl_hw_14_reg_dump_to_buffer;
		ctrl->ops.schedule_dma_cmd = NULL;
		ctrl->ops.get_cont_splash_status = NULL;
		break;
		case DSI_CTRL_VERSION_2_0:
		ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map;
		@@ -90,9 +91,12 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl,
		ctrl->ops.clamp_enable = NULL;
		ctrl->ops.clamp_disable = NULL;
		ctrl->ops.schedule_dma_cmd = NULL;
		ctrl->ops.get_cont_splash_status = NULL;
		break;
		case DSI_CTRL_VERSION_2_2:
		ctrl->ops.phy_reset_config = dsi_ctrl_hw_22_phy_reset_config;
		ctrl->ops.get_cont_splash_status =
		dsi_ctrl_hw_22_get_cont_splash_status;
		ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map;
		ctrl->ops.wait_for_lane_idle =
		dsi_ctrl_hw_20_wait_for_lane_idle;

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -205,4 +205,7 @@ ssize_t dsi_ctrl_hw_20_reg_dump_to_buffer(struct dsi_ctrl_hw *ctrl,
		char *buf,
		u32 size);

		/* Definitions specific to 2.2 DSI controller hardware */
		bool dsi_ctrl_hw_22_get_cont_splash_status(struct dsi_ctrl_hw *ctrl);

		#endif /* _DSI_CATALOG_H_ */

drivers/gpu/drm/msm/dsi-staging/dsi_clk.h

+7 −0

Original line number	Diff line number	Diff line
		@@ -197,6 +197,13 @@ struct dsi_clk_link_set {
		struct clk *pixel_clk;
		};

		/**
		* dsi_display_clk_mngr_update_splash_status() - Update splash stattus
		* @clk_mngr: Structure containing DSI clock information
		* @status: Splash status
		*/
		void dsi_display_clk_mngr_update_splash_status(void *clk_mgr, bool status);

		/**
		* dsi_display_clk_mgr_register() - Register DSI clock manager
		* @info: Structure containing DSI clock information

drivers/gpu/drm/msm/dsi-staging/dsi_clk_manager.c

+25 −0

Original line number	Diff line number	Diff line
		@@ -46,6 +46,7 @@ struct dsi_clk_mngr {
		post_clockon_cb post_clkon_cb;
		pre_clockon_cb pre_clkon_cb;

		bool is_cont_splash_enabled;
		void *priv_data;
		};

		@@ -287,7 +288,18 @@ int dsi_core_clk_stop(struct dsi_core_clks *c_clks)
		static int dsi_link_clk_set_rate(struct dsi_link_clks *l_clks)
		{
		int rc = 0;
		struct dsi_clk_mngr *mngr;

		mngr = container_of(l_clks, struct dsi_clk_mngr, link_clks[0]);

		if (mngr->is_cont_splash_enabled)
		return 0;
		/*
		* In an ideal world, cont_splash_enabled should not be required inside
		* the clock manager. But, in the current driver cont_splash_enabled
		* flag is set inside mdp driver and there is no interface event
		* associated with this flag setting.
		*/
		rc = clk_set_rate(l_clks->clks.esc_clk, l_clks->freq.esc_clk_rate);
		if (rc) {
		pr_err("clk_set_rate failed for esc_clk rc = %d\n", rc);
		@@ -1143,6 +1155,19 @@ int dsi_deregister_clk_handle(void *client)
		return rc;
		}

		void dsi_display_clk_mngr_update_splash_status(void *clk_mgr, bool status)
		{
		struct dsi_clk_mngr *mngr;

		if (!clk_mgr) {
		pr_err("Invalid params\n");
		return;
		}

		mngr = (struct dsi_clk_mngr *)clk_mgr;
		mngr->is_cont_splash_enabled = status;
		}

		void dsi_display_clk_mngr_register(struct dsi_clk_info info)
		{
		struct dsi_clk_mngr *mngr;

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c

+54 −11

Original line number	Diff line number	Diff line
		@@ -2252,6 +2252,7 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl)
		/**
		* dsi_ctrl_host_init() - Initialize DSI host hardware.
		* @dsi_ctrl: DSI controller handle.
		* @is_splash_enabled: boolean signifying splash status.
		*
		* Initializes DSI controller hardware with host configuration provided by
		* dsi_ctrl_update_host_config(). Initialization can be performed only during
		@@ -2260,7 +2261,7 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl)
		*
		* Return: error code.
		*/
		int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl)
		int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled)
		{
		int rc = 0;

		@@ -2277,6 +2278,10 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl)
		goto error;
		}

		/* For Splash usecases we omit hw operations as bootloader
		* already takes care of them
		*/
		if (!is_splash_enabled) {
		dsi_ctrl->hw.ops.setup_lane_map(&dsi_ctrl->hw,
		&dsi_ctrl->host_config.lane_map);

		@@ -2300,14 +2305,15 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl)
		dsi_ctrl->hw.ops.set_video_timing(&dsi_ctrl->hw,
		&dsi_ctrl->host_config.video_timing);
		}
		}

		dsi_ctrl_setup_isr(dsi_ctrl);

		dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0);
		dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0x0);

		pr_debug("[DSI_%d]Host initialization complete\n",
		dsi_ctrl->cell_index);
		pr_debug("[DSI_%d]Host initialization complete, continuous splash status:%d\n",
		dsi_ctrl->cell_index, is_splash_enabled);
		dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, 0x1);
		error:
		mutex_unlock(&dsi_ctrl->ctrl_lock);
		@@ -2586,6 +2592,43 @@ static void _dsi_ctrl_cache_misr(struct dsi_ctrl *dsi_ctrl)

		}

		/**
		* dsi_ctrl_update_host_engine_state_for_cont_splash() -
		* set engine state for dsi controller during continuous splash
		* @dsi_ctrl: DSI controller handle.
		* @state: Engine state.
		*
		* Set host engine state for DSI controller during continuous splash.
		*
		* Return: error code.
		*/
		int dsi_ctrl_update_host_engine_state_for_cont_splash(struct dsi_ctrl *dsi_ctrl,
		enum dsi_engine_state state)
		{
		int rc = 0;

		if (!dsi_ctrl \|\| (state >= DSI_CTRL_ENGINE_MAX)) {
		pr_err("Invalid params\n");
		return -EINVAL;
		}

		mutex_lock(&dsi_ctrl->ctrl_lock);

		rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_ENGINE, state);
		if (rc) {
		pr_err("[DSI_%d] Controller state check failed, rc=%d\n",
		dsi_ctrl->cell_index, rc);
		goto error;
		}

		pr_debug("[DSI_%d] Set host engine state = %d\n", dsi_ctrl->cell_index,
		state);
		dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_ENGINE, state);
		error:
		mutex_unlock(&dsi_ctrl->ctrl_lock);
		return rc;
		}

		/**
		* dsi_ctrl_set_power_state() - set power state for dsi controller
		* @dsi_ctrl: DSI controller handle.