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Commit 5df554ad authored by Scott Wood's avatar Scott Wood Committed by Alexander Graf
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kvm/ppc/mpic: in-kernel MPIC emulation



Hook the MPIC code up to the KVM interfaces, add locking, etc.

Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
[agraf: add stub function for kvmppc_mpic_set_epr, non-booke, 64bit]
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent f0f5c481
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+37 −0
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MPIC interrupt controller
=========================

Device types supported:
  KVM_DEV_TYPE_FSL_MPIC_20     Freescale MPIC v2.0
  KVM_DEV_TYPE_FSL_MPIC_42     Freescale MPIC v4.2

Only one MPIC instance, of any type, may be instantiated.  The created
MPIC will act as the system interrupt controller, connecting to each
vcpu's interrupt inputs.

Groups:
  KVM_DEV_MPIC_GRP_MISC
  Attributes:
    KVM_DEV_MPIC_BASE_ADDR (rw, 64-bit)
      Base address of the 256 KiB MPIC register space.  Must be
      naturally aligned.  A value of zero disables the mapping.
      Reset value is zero.

  KVM_DEV_MPIC_GRP_REGISTER (rw, 32-bit)
    Access an MPIC register, as if the access were made from the guest.
    "attr" is the byte offset into the MPIC register space.  Accesses
    must be 4-byte aligned.

    MSIs may be signaled by using this attribute group to write
    to the relevant MSIIR.

  KVM_DEV_MPIC_GRP_IRQ_ACTIVE (rw, 32-bit)
    IRQ input line for each standard openpic source.  0 is inactive and 1
    is active, regardless of interrupt sense.

    For edge-triggered interrupts:  Writing 1 is considered an activating
    edge, and writing 0 is ignored.  Reading returns 1 if a previously
    signaled edge has not been acknowledged, and 0 otherwise.

    "attr" is the IRQ number.  IRQ numbers for standard sources are the
    byte offset of the relevant IVPR from EIVPR0, divided by 32.
+7 −1
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@@ -361,6 +361,11 @@ struct kvmppc_slb {
#define KVMPPC_BOOKE_MAX_IAC	4
#define KVMPPC_BOOKE_MAX_DAC	2

/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
#define KVMPPC_EPR_NONE		0 /* EPR not supported */
#define KVMPPC_EPR_USER		1 /* exit to userspace to fill EPR */
#define KVMPPC_EPR_KERNEL	2 /* in-kernel irqchip */

struct kvmppc_booke_debug_reg {
	u32 dbcr0;
	u32 dbcr1;
@@ -526,7 +531,7 @@ struct kvm_vcpu_arch {
	u8 sane;
	u8 cpu_type;
	u8 hcall_needed;
	u8 epr_enabled;
	u8 epr_flags; /* KVMPPC_EPR_xxx */
	u8 epr_needed;

	u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
@@ -593,5 +598,6 @@ struct kvm_vcpu_arch {
#define KVM_MMIO_REG_FQPR	0x0060

#define __KVM_HAVE_ARCH_WQP
#define __KVM_HAVE_CREATE_DEVICE

#endif /* __POWERPC_KVM_HOST_H__ */
+17 −0
Original line number Diff line number Diff line
@@ -164,6 +164,8 @@ extern int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu);

extern int kvm_vm_ioctl_get_htab_fd(struct kvm *kvm, struct kvm_get_htab_fd *);

int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq);

/*
 * Cuts out inst bits with ordering according to spec.
 * That means the leftmost bit is zero. All given bits are included.
@@ -245,6 +247,9 @@ int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *);

void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);

struct openpic;
void kvmppc_mpic_put(struct openpic *opp);

#ifdef CONFIG_KVM_BOOK3S_64_HV
static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
{
@@ -270,6 +275,18 @@ static inline void kvmppc_set_epr(struct kvm_vcpu *vcpu, u32 epr)
#endif
}

#ifdef CONFIG_KVM_MPIC

void kvmppc_mpic_set_epr(struct kvm_vcpu *vcpu);

#else

static inline void kvmppc_mpic_set_epr(struct kvm_vcpu *vcpu)
{
}

#endif /* CONFIG_KVM_MPIC */

int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
			      struct kvm_config_tlb *cfg);
int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
+8 −0
Original line number Diff line number Diff line
@@ -382,6 +382,14 @@ struct kvm_get_htab_header {
	__u16	n_invalid;
};

/* Device control API: PPC-specific devices */
#define KVM_DEV_MPIC_GRP_MISC		1
#define   KVM_DEV_MPIC_BASE_ADDR	0	/* 64-bit */

#define KVM_DEV_MPIC_GRP_REGISTER	2	/* 32-bit */
#define KVM_DEV_MPIC_GRP_IRQ_ACTIVE	3	/* 32-bit */

/* One-Reg API: PPC-specific registers */
#define KVM_REG_PPC_HIOR	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x1)
#define KVM_REG_PPC_IAC1	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x2)
#define KVM_REG_PPC_IAC2	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x3)
+9 −0
Original line number Diff line number Diff line
@@ -151,6 +151,15 @@ config KVM_E500MC

	  If unsure, say N.

config KVM_MPIC
	bool "KVM in-kernel MPIC emulation"
	depends on KVM
	help
	  Enable support for emulating MPIC devices inside the
          host kernel, rather than relying on userspace to emulate.
          Currently, support is limited to certain versions of
          Freescale's MPIC implementation.

source drivers/vhost/Kconfig

endif # VIRTUALIZATION
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