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Commit 5dbe7890 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman
Browse files

clk: gxbb: expose USB clocks 



USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Acked-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent f2120a8b

drivers/clk/meson/gxbb.h

+5 −5
Original line number Diff line number Diff line
@@ -218,12 +218,12 @@ 
#define CLKID_AIU		  47

#define CLKID_UART1		  48

#define CLKID_G2D		  49

#define CLKID_USB0		  50

#define CLKID_USB1		  51

/* CLKID_USB0 */

/* CLKID_USB1 */

#define CLKID_RESET		  52

#define CLKID_NAND		  53

#define CLKID_DOS_PARSER	  54

#define CLKID_USB		  55

/* CLKID_USB */

#define CLKID_VDIN1		  56

#define CLKID_AHB_ARB0		  57

#define CLKID_EFUSE		  58
@@ -232,8 +232,8 @@ 
#define CLKID_AHB_CTRL_BUS	  61

#define CLKID_HDMI_INTR_SYNC	  62

#define CLKID_HDMI_PCLK		  63

#define CLKID_USB1_DDR_BRIDGE	  64

#define CLKID_USB0_DDR_BRIDGE	  65

/* CLKID_USB1_DDR_BRIDGE */

/* CLKID_USB0_DDR_BRIDGE */

#define CLKID_MMC_PCLK		  66

#define CLKID_DVIN		  67

#define CLKID_UART2		  68

include/dt-bindings/clock/gxbb-clkc.h

+5 −0
Original line number Diff line number Diff line
@@ -14,6 +14,11 @@ 
#define CLKID_MPLL2		15

#define CLKID_SPI		34

#define CLKID_ETH		36

#define CLKID_USB0		50

#define CLKID_USB1		51

#define CLKID_USB		55

#define CLKID_USB1_DDR_BRIDGE	64

#define CLKID_USB0_DDR_BRIDGE	65

#define CLKID_SD_EMMC_A		94

#define CLKID_SD_EMMC_B		95

#define CLKID_SD_EMMC_C		96