Merge "arm64: dma-mapping: Remove unused dma_map_ops" into msm-4.8

	return prot;

}

/*

 * Map a part of the scatter-gather list into contiguous io address space

 */

static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,

			  size_t size, dma_addr_t *handle,

			  enum dma_data_direction dir, unsigned long attrs,

			  bool is_coherent)

{

	struct dma_iommu_mapping *mapping = dev->archdata.mapping;

	dma_addr_t iova, iova_base;

	int ret = 0;

	unsigned int count;

	struct scatterlist *s;

	int prot;

	size = PAGE_ALIGN(size);

	*handle = DMA_ERROR_CODE;

	iova_base = iova = __alloc_iova(mapping, size);

	if (iova == DMA_ERROR_CODE)

		return -ENOMEM;

	for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {

		phys_addr_t phys = page_to_phys(sg_page(s));

		unsigned int len = PAGE_ALIGN(s->offset + s->length);

		if (!is_coherent &&

			!(attrs & DMA_ATTR_SKIP_CPU_SYNC))

			__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length,

					dir);

		prot = __dma_direction_to_prot(dir);

		if (!(attrs & DMA_ATTR_EXEC_MAPPING))

			prot |= IOMMU_NOEXEC;

		ret = iommu_map(mapping->domain, iova, phys, len, prot);

		if (ret < 0)

			goto fail;

		count += len >> PAGE_SHIFT;

		iova += len;

	}

	*handle = iova_base;

	return 0;

fail:

	iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);

	__free_iova(mapping, iova_base, size);

	return ret;

}

static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,

		     enum dma_data_direction dir, unsigned long attrs,

		     bool is_coherent)

{

	struct scatterlist *s = sg, *dma = sg, *start = sg;

	int i, count = 0;

	unsigned int offset = s->offset;

	unsigned int size = s->offset + s->length;

	unsigned int max = dma_get_max_seg_size(dev);

	for (i = 1; i < nents; i++) {

		s = sg_next(s);

		s->dma_address = DMA_ERROR_CODE;

		s->dma_length = 0;

		if (s->offset || (size & ~PAGE_MASK)

			|| size + s->length > max) {

			if (__map_sg_chunk(dev, start, size, &dma->dma_address,

			    dir, attrs, is_coherent) < 0)

				goto bad_mapping;

			dma->dma_address += offset;

			dma->dma_length = size - offset;

			size = offset = s->offset;

			start = s;

			dma = sg_next(dma);

			count += 1;

		}

		size += s->length;

	}

	if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,

		is_coherent) < 0)

		goto bad_mapping;

	dma->dma_address += offset;

	dma->dma_length = size - offset;

	return count+1;

bad_mapping:

	for_each_sg(sg, s, count, i)

		__iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));

	return 0;

}

/**

 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA

 * @dev: valid struct device pointer

 * @sg: list of buffers

 * @nents: number of buffers to map

 * @dir: DMA transfer direction

 *

 * Map a set of i/o coherent buffers described by scatterlist in streaming

 * mode for DMA. The scatter gather list elements are merged together (if

 * possible) and tagged with the appropriate dma address and length. They are

 * obtained via sg_dma_{address,length}.

 */

int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,

		int nents, enum dma_data_direction dir, unsigned long attrs)

{

	return __iommu_map_sg(dev, sg, nents, dir, attrs, true);

}

/**

 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA

 * @dev: valid struct device pointer

	return nents;

}

static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,

		int nents, enum dma_data_direction dir, unsigned long attrs,

		bool is_coherent)

{

	struct scatterlist *s;

	int i;

	for_each_sg(sg, s, nents, i) {

		if (sg_dma_len(s))

			__iommu_remove_mapping(dev, sg_dma_address(s),

					       sg_dma_len(s));

		if (!is_coherent &&

		    !(attrs & DMA_ATTR_SKIP_CPU_SYNC))

			__dma_page_dev_to_cpu(sg_page(s), s->offset,

					      s->length, dir);

	}

}

/**

 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg

 * @dev: valid struct device pointer

 * @sg: list of buffers

 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)

 * @dir: DMA transfer direction (same as was passed to dma_map_sg)

 *

 * Unmap a set of streaming mode DMA translations.  Again, CPU access

 * rules concerning calls here are the same as for dma_unmap_single().

 */

void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,

		int nents, enum dma_data_direction dir, unsigned long attrs)

{

	__iommu_unmap_sg(dev, sg, nents, dir, attrs, true);

}

/**

 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg

 * @dev: valid struct device pointer

	return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);

}

/**

 * arm_coherent_iommu_unmap_page

 * @dev: valid struct device pointer

 * @handle: DMA address of buffer

 * @size: size of buffer (same as passed to dma_map_page)

 * @dir: DMA transfer direction (same as passed to dma_map_page)

 *

 * Coherent IOMMU aware version of arm_dma_unmap_page()

 */

static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,

		size_t size, enum dma_data_direction dir,

		unsigned long attrs)

{

	struct dma_iommu_mapping *mapping = dev->archdata.mapping;

	dma_addr_t iova = handle & PAGE_MASK;

	int offset = handle & ~PAGE_MASK;

	int len = PAGE_ALIGN(size + offset);

	if (!iova)

		return;

	iommu_unmap(mapping->domain, iova, len);

	__free_iova(mapping, iova, len);

}

/**

 * arm_iommu_unmap_page

 * @dev: valid struct device pointer

	.mapping_error		= arm_iommu_mapping_error,

};

const struct dma_map_ops iommu_coherent_ops = {

	.alloc		= arm_iommu_alloc_attrs,

	.free		= arm_iommu_free_attrs,

	.mmap		= arm_iommu_mmap_attrs,

	.get_sgtable	= arm_iommu_get_sgtable,

	.map_page	= arm_coherent_iommu_map_page,

	.unmap_page	= arm_coherent_iommu_unmap_page,

	.map_sg		= arm_coherent_iommu_map_sg,

	.unmap_sg	= arm_coherent_iommu_unmap_sg,

	.set_dma_mask	= arm_dma_set_mask,

};

/**

 * arm_iommu_create_mapping

 * @bus: pointer to the bus holding the client device (for IOMMU calls)