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Commit 5d1924c1 authored by Can Guo's avatar Can Guo Committed by Gerrit - the friendly Code Review server
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scsi: ufs: update dev ref clock gating wait time



This change updates the wait time before turning off the reference clock.
The wait time of UFS version 3.0 and onward devices can be read out from
their device attributes. Otherwise, fix the wait time to 100 micro seconds.

Change-Id: Ie5085e62ef3efa2bfaa3f632593e4ade52ffd645
Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
Signed-off-by: default avatarSayali Lokhande <sayalil@codeaurora.org>
parent 6085f0ad
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+4 −4
Original line number Diff line number Diff line
/*
 * Copyright (c) 2013-2018, Linux Foundation. All rights reserved.
 * Copyright (c) 2013-2019, Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -1308,11 +1308,11 @@ static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_qcom_host *host, bool enable)
		/*
		 * If we are here to disable this clock it might be immediately
		 * after entering into hibern8 in which case we need to make
		 * sure that device ref_clk is active at least 1us after the
		 * hibern8 enter.
		 * sure that device ref_clk is active for a given time after the
		 * hibern8 enter for pre UFS3.0 devices
		 */
		if (!enable)
			udelay(1);
			udelay(host->hba->dev_ref_clk_gating_wait);

		writel_relaxed(temp, host->dev_ref_clk_ctrl_mmio);

+1 −0
Original line number Diff line number Diff line
@@ -505,6 +505,7 @@ struct ufs_dev_info {
	u8	b_device_sub_class;
	u16	w_manufacturer_id;
	u8	i_product_name;
	u16	w_spec_version;

	/* query flags */
	bool f_power_on_wp_en;
+33 −0
Original line number Diff line number Diff line
@@ -244,6 +244,9 @@ static void ufshcd_update_uic_error_cnt(struct ufs_hba *hba, u32 reg, int type)
/* default value of auto suspend is 3 seconds */
#define UFSHCD_AUTO_SUSPEND_DELAY_MS 3000 /* millisecs */

/* default value of ref clock gating wait time is 100 micro seconds */
#define UFSHCD_REF_CLK_GATING_WAIT_US 100 /* microsecs */

#define UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE	10
#define UFSHCD_CLK_GATING_DELAY_MS_PERF		50

@@ -7900,6 +7903,31 @@ static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
	return err;
}

static int ufshcd_get_dev_ref_clk_gating_wait(struct ufs_hba *hba)
{
	int err = 0;
	u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;

	if (hba->dev_info.w_spec_version >= 0x300) {
		err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
				QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
				&gating_wait);

		if (err)
			dev_err(hba->dev, "failed reading bRefClkGatingWait. err = %d, use default %uus\n",
					err, gating_wait);

		if (gating_wait == 0) {
			gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
			dev_err(hba->dev, "undefined ref clk gating wait time, use default %uus\n",
					gating_wait);
		}
	}

	hba->dev_ref_clk_gating_wait = gating_wait;
	return err;
}

static int ufs_read_device_desc_data(struct ufs_hba *hba)
{
	int err = 0;
@@ -7928,6 +7956,10 @@ static int ufs_read_device_desc_data(struct ufs_hba *hba)
	hba->dev_info.b_device_sub_class =
		desc_buf[DEVICE_DESC_PARAM_DEVICE_SUB_CLASS];
	hba->dev_info.i_product_name = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
	hba->dev_info.w_spec_version =
		desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
		desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];

out:
	kfree(desc_buf);
	return err;
@@ -8038,6 +8070,7 @@ static int ufshcd_probe_hba(struct ufs_hba *hba)
			"%s: Failed getting max supported power mode\n",
			__func__);
	} else {
		ufshcd_get_dev_ref_clk_gating_wait(hba);
		/*
		 * Set the right value to bRefClkFreq before attempting to
		 * switch to HS gears.
+2 −1
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@
 *
 * This code is based on drivers/scsi/ufs/ufshcd.h
 * Copyright (C) 2011-2013 Samsung India Software Operations
 * Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
 *
 * Authors:
 *	Santosh Yaraganavi <santosh.sy@samsung.com>
@@ -808,6 +808,7 @@ struct ufs_hba {
	unsigned int irq;
	bool is_irq_enabled;

	u32 dev_ref_clk_gating_wait;
	u32 dev_ref_clk_freq;

	/* Interrupt aggregation support is broken */
+4 −0
Original line number Diff line number Diff line
@@ -36,8 +36,12 @@ enum attr_idn {
	QUERY_ATTR_IDN_SECONDS_PASSED		= 0x0F,
	QUERY_ATTR_IDN_CNTX_CONF		= 0x10,
	QUERY_ATTR_IDN_CORR_PRG_BLK_NUM		= 0x11,
	QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME	= 0x17,
};

#define QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME \
				QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME

#define QUERY_ATTR_IDN_BOOT_LU_EN_MAX	0x02

/* Descriptor idn for Query requests */