Loading arch/arm/boot/dts/qcom/sdxpoorwills-rumi.dts +8 −0 Original line number Diff line number Diff line Loading @@ -28,3 +28,11 @@ pinctrl-0 = <&uart2_console_active>; status = "ok"; }; &gdsc_usb30 { compatible = "regulator-fixed"; }; &gdsc_pcie { compatible = "regulator-fixed"; }; arch/arm/boot/dts/qcom/sdxpoorwills.dtsi +14 −0 Original line number Diff line number Diff line Loading @@ -165,4 +165,18 @@ <&clock_gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; }; gdsc_usb30: qcom,gdsc@10b004 { compatible = "qcom,gdsc"; regulator-name = "gdsc_usb30"; reg = <0x0010b004 0x4>; status = "ok"; }; gdsc_pcie: qcom,gdsc@137004 { compatible = "qcom,gdsc"; regulator-name = "gdsc_pcie"; reg = <0x00137004 0x4>; status = "ok"; }; }; Loading
arch/arm/boot/dts/qcom/sdxpoorwills-rumi.dts +8 −0 Original line number Diff line number Diff line Loading @@ -28,3 +28,11 @@ pinctrl-0 = <&uart2_console_active>; status = "ok"; }; &gdsc_usb30 { compatible = "regulator-fixed"; }; &gdsc_pcie { compatible = "regulator-fixed"; };
arch/arm/boot/dts/qcom/sdxpoorwills.dtsi +14 −0 Original line number Diff line number Diff line Loading @@ -165,4 +165,18 @@ <&clock_gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; }; gdsc_usb30: qcom,gdsc@10b004 { compatible = "qcom,gdsc"; regulator-name = "gdsc_usb30"; reg = <0x0010b004 0x4>; status = "ok"; }; gdsc_pcie: qcom,gdsc@137004 { compatible = "qcom,gdsc"; regulator-name = "gdsc_pcie"; reg = <0x00137004 0x4>; status = "ok"; }; };