Loading drivers/gpu/drm/msm/sde/sde_crtc.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -1692,11 +1692,11 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, CRTC_PROP_CORE_CLK); CRTC_PROP_CORE_CLK); msm_property_install_range(&sde_crtc->property_info, msm_property_install_range(&sde_crtc->property_info, "core_ab", 0x0, 0, U64_MAX, "core_ab", 0x0, 0, U64_MAX, SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA, SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA, CRTC_PROP_CORE_AB); CRTC_PROP_CORE_AB); msm_property_install_range(&sde_crtc->property_info, msm_property_install_range(&sde_crtc->property_info, "core_ib", 0x0, 0, U64_MAX, "core_ib", 0x0, 0, U64_MAX, SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA, SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA, CRTC_PROP_CORE_IB); CRTC_PROP_CORE_IB); msm_property_install_blob(&sde_crtc->property_info, "capabilities", msm_property_install_blob(&sde_crtc->property_info, "capabilities", Loading drivers/gpu/drm/msm/sde_power_handle.c +42 −12 Original line number Original line Diff line number Diff line Loading @@ -482,18 +482,6 @@ static int sde_power_data_bus_parse(struct platform_device *pdev, goto end; goto end; } } pr_debug("register data_bus_hdl=%x\n", pdbus->data_bus_hdl); pr_debug("register data_bus_hdl=%x\n", pdbus->data_bus_hdl); /* * Following call will not result in actual vote rather update * the current index and ab/ib value. When continuous splash * is enabled, actual vote will happen when splash handoff is * done. */ return _sde_power_data_bus_set_quota(pdbus, SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA, SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA, SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA, SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA); } } end: end: Loading Loading @@ -537,6 +525,31 @@ static void sde_power_reg_bus_unregister(u32 reg_bus_hdl) msm_bus_scale_unregister_client(reg_bus_hdl); msm_bus_scale_unregister_client(reg_bus_hdl); } } static int sde_power_data_bus_update(struct sde_power_data_bus_handle *pdbus, bool enable) { int rc = 0; u64 ab_quota_rt, ab_quota_nrt; u64 ib_quota_rt, ib_quota_nrt; ab_quota_rt = ab_quota_nrt = enable ? SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA : SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA; ib_quota_rt = ib_quota_nrt = enable ? SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA : SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA; if (pdbus->data_bus_hdl) rc = _sde_power_data_bus_set_quota(pdbus, ab_quota_rt, ab_quota_nrt, ib_quota_rt, ib_quota_nrt); if (rc) pr_err("failed to set data bus vote rc=%d enable:%d\n", rc, enable); return rc; } static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) { { int rc = 0; int rc = 0; Loading Loading @@ -582,6 +595,12 @@ static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) { { return 0; return 0; } } static int sde_power_data_bus_update(struct sde_power_data_bus_handle *pdbus, bool enable) { return 0; } #endif #endif int sde_power_resource_init(struct platform_device *pdev, int sde_power_resource_init(struct platform_device *pdev, Loading Loading @@ -738,6 +757,13 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, goto end; goto end; if (enable) { if (enable) { rc = sde_power_data_bus_update(&phandle->data_bus_handle, enable); if (rc) { pr_err("failed to set data bus vote rc=%d\n", rc); goto data_bus_hdl_err; } rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); if (rc) { if (rc) { pr_err("failed to enable vregs rc=%d\n", rc); pr_err("failed to enable vregs rc=%d\n", rc); Loading @@ -763,6 +789,8 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, max_usecase_ndx); max_usecase_ndx); msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); sde_power_data_bus_update(&phandle->data_bus_handle, enable); } } end: end: Loading @@ -774,6 +802,8 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, reg_bus_hdl_err: reg_bus_hdl_err: msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0); msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0); vreg_err: vreg_err: sde_power_data_bus_update(&phandle->data_bus_handle, 0); data_bus_hdl_err: phandle->current_usecase_ndx = prev_usecase_ndx; phandle->current_usecase_ndx = prev_usecase_ndx; mutex_unlock(&phandle->phandle_lock); mutex_unlock(&phandle->phandle_lock); return rc; return rc; Loading drivers/gpu/drm/msm/sde_power_handle.h +4 −2 Original line number Original line Diff line number Diff line Loading @@ -16,8 +16,10 @@ #define MAX_CLIENT_NAME_LEN 128 #define MAX_CLIENT_NAME_LEN 128 #define SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA 2000000000 #define SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA 64000 #define SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA 2000000000 #define SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA 0 #define SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA 64000 #define SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA 0 /** /** * mdss_bus_vote_type: register bus vote type * mdss_bus_vote_type: register bus vote type Loading Loading
drivers/gpu/drm/msm/sde/sde_crtc.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -1692,11 +1692,11 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, CRTC_PROP_CORE_CLK); CRTC_PROP_CORE_CLK); msm_property_install_range(&sde_crtc->property_info, msm_property_install_range(&sde_crtc->property_info, "core_ab", 0x0, 0, U64_MAX, "core_ab", 0x0, 0, U64_MAX, SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA, SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA, CRTC_PROP_CORE_AB); CRTC_PROP_CORE_AB); msm_property_install_range(&sde_crtc->property_info, msm_property_install_range(&sde_crtc->property_info, "core_ib", 0x0, 0, U64_MAX, "core_ib", 0x0, 0, U64_MAX, SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA, SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA, CRTC_PROP_CORE_IB); CRTC_PROP_CORE_IB); msm_property_install_blob(&sde_crtc->property_info, "capabilities", msm_property_install_blob(&sde_crtc->property_info, "capabilities", Loading
drivers/gpu/drm/msm/sde_power_handle.c +42 −12 Original line number Original line Diff line number Diff line Loading @@ -482,18 +482,6 @@ static int sde_power_data_bus_parse(struct platform_device *pdev, goto end; goto end; } } pr_debug("register data_bus_hdl=%x\n", pdbus->data_bus_hdl); pr_debug("register data_bus_hdl=%x\n", pdbus->data_bus_hdl); /* * Following call will not result in actual vote rather update * the current index and ab/ib value. When continuous splash * is enabled, actual vote will happen when splash handoff is * done. */ return _sde_power_data_bus_set_quota(pdbus, SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA, SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA, SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA, SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA); } } end: end: Loading Loading @@ -537,6 +525,31 @@ static void sde_power_reg_bus_unregister(u32 reg_bus_hdl) msm_bus_scale_unregister_client(reg_bus_hdl); msm_bus_scale_unregister_client(reg_bus_hdl); } } static int sde_power_data_bus_update(struct sde_power_data_bus_handle *pdbus, bool enable) { int rc = 0; u64 ab_quota_rt, ab_quota_nrt; u64 ib_quota_rt, ib_quota_nrt; ab_quota_rt = ab_quota_nrt = enable ? SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA : SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA; ib_quota_rt = ib_quota_nrt = enable ? SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA : SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA; if (pdbus->data_bus_hdl) rc = _sde_power_data_bus_set_quota(pdbus, ab_quota_rt, ab_quota_nrt, ib_quota_rt, ib_quota_nrt); if (rc) pr_err("failed to set data bus vote rc=%d enable:%d\n", rc, enable); return rc; } static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) { { int rc = 0; int rc = 0; Loading Loading @@ -582,6 +595,12 @@ static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) { { return 0; return 0; } } static int sde_power_data_bus_update(struct sde_power_data_bus_handle *pdbus, bool enable) { return 0; } #endif #endif int sde_power_resource_init(struct platform_device *pdev, int sde_power_resource_init(struct platform_device *pdev, Loading Loading @@ -738,6 +757,13 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, goto end; goto end; if (enable) { if (enable) { rc = sde_power_data_bus_update(&phandle->data_bus_handle, enable); if (rc) { pr_err("failed to set data bus vote rc=%d\n", rc); goto data_bus_hdl_err; } rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); if (rc) { if (rc) { pr_err("failed to enable vregs rc=%d\n", rc); pr_err("failed to enable vregs rc=%d\n", rc); Loading @@ -763,6 +789,8 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, max_usecase_ndx); max_usecase_ndx); msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable); sde_power_data_bus_update(&phandle->data_bus_handle, enable); } } end: end: Loading @@ -774,6 +802,8 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, reg_bus_hdl_err: reg_bus_hdl_err: msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0); msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0); vreg_err: vreg_err: sde_power_data_bus_update(&phandle->data_bus_handle, 0); data_bus_hdl_err: phandle->current_usecase_ndx = prev_usecase_ndx; phandle->current_usecase_ndx = prev_usecase_ndx; mutex_unlock(&phandle->phandle_lock); mutex_unlock(&phandle->phandle_lock); return rc; return rc; Loading
drivers/gpu/drm/msm/sde_power_handle.h +4 −2 Original line number Original line Diff line number Diff line Loading @@ -16,8 +16,10 @@ #define MAX_CLIENT_NAME_LEN 128 #define MAX_CLIENT_NAME_LEN 128 #define SDE_POWER_HANDLE_DATA_BUS_IB_QUOTA 2000000000 #define SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA 64000 #define SDE_POWER_HANDLE_DATA_BUS_AB_QUOTA 2000000000 #define SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA 0 #define SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA 64000 #define SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA 0 /** /** * mdss_bus_vote_type: register bus vote type * mdss_bus_vote_type: register bus vote type Loading