Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5c7942b8 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ASoC: wcd934x: add support for write DMA3 path"

parents 0bd464b5 9df91e6c

sound/soc/codecs/wcd934x/wcd934x-routing.h

+64 −0
Original line number Diff line number Diff line
@@ -117,6 +117,70 @@ const struct snd_soc_dapm_route tavil_slim_audio_map[] = { 


const struct snd_soc_dapm_route tavil_audio_map[] = {



	/* WDMA3 */

	{"WDMA3 PORT0 MUX", "DEC0", "ADC MUX0"},

	{"WDMA3 PORT0 MUX", "RX_MIX_TX0", "RX MIX TX0 MUX"},

	{"WDMA3 PORT1 MUX", "DEC1", "ADC MUX1"},

	{"WDMA3 PORT1 MUX", "RX_MIX_TX1", "RX MIX TX1 MUX"},

	{"WDMA3 PORT2 MUX", "DEC2", "ADC MUX2"},

	{"WDMA3 PORT2 MUX", "RX_MIX_TX2", "RX MIX TX2 MUX"},

	{"WDMA3 PORT3 MUX", "DEC3", "ADC MUX3"},

	{"WDMA3 PORT3 MUX", "RX_MIX_TX3", "RX MIX TX3 MUX"},

	{"WDMA3 PORT4 MUX", "DEC4", "ADC MUX4"},

	{"WDMA3 PORT4 MUX", "RX_MIX_TX4", "RX MIX TX4 MUX"},

	{"WDMA3 PORT5 MUX", "DEC5", "ADC MUX5"},

	{"WDMA3 PORT5 MUX", "RX_MIX_TX5", "RX MIX TX5 MUX"},

	{"WDMA3 PORT6 MUX", "DEC6", "ADC MUX6"},

	{"WDMA3 PORT6 MUX", "RX_MIX_TX6", "RX MIX TX6 MUX"},



	{"WDMA3 CH0 MUX", "PORT_0", "WDMA3 PORT0 MUX"},

	{"WDMA3 CH0 MUX", "PORT_1", "WDMA3 PORT1 MUX"},

	{"WDMA3 CH0 MUX", "PORT_2", "WDMA3 PORT2 MUX"},

	{"WDMA3 CH0 MUX", "PORT_3", "WDMA3 PORT3 MUX"},

	{"WDMA3 CH0 MUX", "PORT_4", "WDMA3 PORT4 MUX"},

	{"WDMA3 CH0 MUX", "PORT_5", "WDMA3 PORT5 MUX"},

	{"WDMA3 CH0 MUX", "PORT_6", "WDMA3 PORT6 MUX"},

	{"WDMA3 CH0 MUX", "PORT_7", "ADC MUX7"},

	{"WDMA3 CH0 MUX", "PORT_8", "ADC MUX8"},



	{"WDMA3 CH1 MUX", "PORT_0", "WDMA3 PORT0 MUX"},

	{"WDMA3 CH1 MUX", "PORT_1", "WDMA3 PORT1 MUX"},

	{"WDMA3 CH1 MUX", "PORT_2", "WDMA3 PORT2 MUX"},

	{"WDMA3 CH1 MUX", "PORT_3", "WDMA3 PORT3 MUX"},

	{"WDMA3 CH1 MUX", "PORT_4", "WDMA3 PORT4 MUX"},

	{"WDMA3 CH1 MUX", "PORT_5", "WDMA3 PORT5 MUX"},

	{"WDMA3 CH1 MUX", "PORT_6", "WDMA3 PORT6 MUX"},

	{"WDMA3 CH1 MUX", "PORT_7", "ADC MUX7"},

	{"WDMA3 CH1 MUX", "PORT_8", "ADC MUX8"},



	{"WDMA3 CH2 MUX", "PORT_0", "WDMA3 PORT0 MUX"},

	{"WDMA3 CH2 MUX", "PORT_1", "WDMA3 PORT1 MUX"},

	{"WDMA3 CH2 MUX", "PORT_2", "WDMA3 PORT2 MUX"},

	{"WDMA3 CH2 MUX", "PORT_3", "WDMA3 PORT3 MUX"},

	{"WDMA3 CH2 MUX", "PORT_4", "WDMA3 PORT4 MUX"},

	{"WDMA3 CH2 MUX", "PORT_5", "WDMA3 PORT5 MUX"},

	{"WDMA3 CH2 MUX", "PORT_6", "WDMA3 PORT6 MUX"},

	{"WDMA3 CH2 MUX", "PORT_7", "ADC MUX7"},

	{"WDMA3 CH2 MUX", "PORT_8", "ADC MUX8"},



	{"WDMA3 CH3 MUX", "PORT_0", "WDMA3 PORT0 MUX"},

	{"WDMA3 CH3 MUX", "PORT_1", "WDMA3 PORT1 MUX"},

	{"WDMA3 CH3 MUX", "PORT_2", "WDMA3 PORT2 MUX"},

	{"WDMA3 CH3 MUX", "PORT_3", "WDMA3 PORT3 MUX"},

	{"WDMA3 CH3 MUX", "PORT_4", "WDMA3 PORT4 MUX"},

	{"WDMA3 CH3 MUX", "PORT_5", "WDMA3 PORT5 MUX"},

	{"WDMA3 CH3 MUX", "PORT_6", "WDMA3 PORT6 MUX"},

	{"WDMA3 CH3 MUX", "PORT_7", "ADC MUX7"},

	{"WDMA3 CH3 MUX", "PORT_8", "ADC MUX8"},



	{"WDMA3_CH_MIXER", NULL, "WDMA3 CH0 MUX"},

	{"WDMA3_CH_MIXER", NULL, "WDMA3 CH1 MUX"},

	{"WDMA3_CH_MIXER", NULL, "WDMA3 CH2 MUX"},

	{"WDMA3_CH_MIXER", NULL, "WDMA3 CH3 MUX"},



	{"WDMA3_ON_OFF", "Switch", "WDMA3_CH_MIXER"},

	{"WDMA3_OUT", NULL, "WDMA3_ON_OFF"},



	/* MAD */

	{"MAD_SEL MUX", "SPE", "MAD_CPE_INPUT"},

	{"MAD_SEL MUX", "MSM", "MADINPUT"},

sound/soc/codecs/wcd934x/wcd934x.c

+101 −0
Original line number Diff line number Diff line
@@ -2809,6 +2809,35 @@ static int tavil_get_asrc_mode(struct tavil_priv *tavil, int asrc, 
	return asrc_mode;

}



static int tavil_codec_wdma3_ctl(struct snd_soc_dapm_widget *w,

				   struct snd_kcontrol *kcontrol, int event)

{

	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);



	switch (event) {

	case SND_SOC_DAPM_PRE_PMU:

		/* Fix to 16KHz */

		snd_soc_update_bits(codec, WCD934X_DMA_WDMA_CTL_3,

				    0xF0, 0x10);

		/* Select mclk_1 */

		snd_soc_update_bits(codec, WCD934X_DMA_WDMA_CTL_3,

				    0x02, 0x00);

		/* Enable DMA */

		snd_soc_update_bits(codec, WCD934X_DMA_WDMA_CTL_3,

				    0x01, 0x01);

		break;



	case SND_SOC_DAPM_POST_PMD:

		/* Disable DMA */

		snd_soc_update_bits(codec, WCD934X_DMA_WDMA_CTL_3,

				    0x01, 0x00);

		break;



	};



	return 0;

}



static int tavil_codec_enable_asrc(struct snd_soc_codec *codec,

				   int asrc_in, int event)

{
@@ -6165,6 +6194,39 @@ static const char * const native_mux_text[] = { 
	"OFF", "ON",

};



static const char *const wdma3_port0_text[] = {

	"RX_MIX_TX0", "DEC0"

};



static const char *const wdma3_port1_text[] = {

	"RX_MIX_TX1", "DEC1"

};



static const char *const wdma3_port2_text[] = {

	"RX_MIX_TX2", "DEC2"

};



static const char *const wdma3_port3_text[] = {

	"RX_MIX_TX3", "DEC3"

};



static const char *const wdma3_port4_text[] = {

	"RX_MIX_TX4", "DEC4"

};



static const char *const wdma3_port5_text[] = {

	"RX_MIX_TX5", "DEC5"

};



static const char *const wdma3_port6_text[] = {

	"RX_MIX_TX6", "DEC6"

};



static const char *const wdma3_ch_text[] = {

	"PORT_0", "PORT_1", "PORT_2", "PORT_3", "PORT_4",

	"PORT_5", "PORT_6", "PORT_7", "PORT_8",

};



static const struct snd_kcontrol_new aif4_vi_mixer[] = {

	SOC_SINGLE_EXT("SPKR_VI_1", SND_SOC_NOPM, WCD934X_TX14, 1, 0,

			tavil_vi_feed_mixer_get, tavil_vi_feed_mixer_put),
@@ -6570,6 +6632,20 @@ WCD_DAPM_ENUM(int8_2_native, SND_SOC_NOPM, 0, native_mux_text); 
WCD_DAPM_ENUM(anc0_fb, WCD934X_CDC_RX_INP_MUX_ANC_CFG0, 0, anc0_fb_mux_text);

WCD_DAPM_ENUM(anc1_fb, WCD934X_CDC_RX_INP_MUX_ANC_CFG0, 3, anc1_fb_mux_text);





WCD_DAPM_ENUM(wdma3_port0, WCD934X_DMA_WDMA3_PRT_CFG, 0, wdma3_port0_text);

WCD_DAPM_ENUM(wdma3_port1, WCD934X_DMA_WDMA3_PRT_CFG, 1, wdma3_port1_text);

WCD_DAPM_ENUM(wdma3_port2, WCD934X_DMA_WDMA3_PRT_CFG, 2, wdma3_port2_text);

WCD_DAPM_ENUM(wdma3_port3, WCD934X_DMA_WDMA3_PRT_CFG, 3, wdma3_port3_text);

WCD_DAPM_ENUM(wdma3_port4, WCD934X_DMA_WDMA3_PRT_CFG, 4, wdma3_port4_text);

WCD_DAPM_ENUM(wdma3_port5, WCD934X_DMA_WDMA3_PRT_CFG, 5, wdma3_port5_text);

WCD_DAPM_ENUM(wdma3_port6, WCD934X_DMA_WDMA3_PRT_CFG, 6, wdma3_port6_text);



WCD_DAPM_ENUM(wdma3_ch0, WCD934X_DMA_CH_0_1_CFG_WDMA_3, 0, wdma3_ch_text);

WCD_DAPM_ENUM(wdma3_ch1, WCD934X_DMA_CH_0_1_CFG_WDMA_3, 4, wdma3_ch_text);

WCD_DAPM_ENUM(wdma3_ch2, WCD934X_DMA_CH_2_3_CFG_WDMA_3, 0, wdma3_ch_text);

WCD_DAPM_ENUM(wdma3_ch3, WCD934X_DMA_CH_2_3_CFG_WDMA_3, 4, wdma3_ch_text);



static const struct snd_kcontrol_new anc_ear_switch =

	SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0);
@@ -6637,6 +6713,9 @@ static const struct snd_kcontrol_new rx_int4_asrc_switch[] = { 
	SOC_DAPM_SINGLE("LO2 Switch", SND_SOC_NOPM, 0, 1, 0),

};



static const struct snd_kcontrol_new wdma3_onoff_switch =

	SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0);



static int tavil_dsd_mixer_get(struct snd_kcontrol *kcontrol,

			       struct snd_ctl_elem_value *ucontrol)

{
@@ -7319,6 +7398,28 @@ static const struct snd_soc_dapm_widget tavil_dapm_widgets[] = { 
	SND_SOC_DAPM_MUX_E("ASRC3 MUX", SND_SOC_NOPM, ASRC3, 0,

		&asrc3_mux, tavil_codec_enable_asrc_resampler,

		SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),



	/* WDMA3 widgets */

	WCD_DAPM_MUX("WDMA3 PORT0 MUX", 0, wdma3_port0),

	WCD_DAPM_MUX("WDMA3 PORT1 MUX", 1, wdma3_port1),

	WCD_DAPM_MUX("WDMA3 PORT2 MUX", 2, wdma3_port2),

	WCD_DAPM_MUX("WDMA3 PORT3 MUX", 3, wdma3_port3),

	WCD_DAPM_MUX("WDMA3 PORT4 MUX", 4, wdma3_port4),

	WCD_DAPM_MUX("WDMA3 PORT5 MUX", 5, wdma3_port5),

	WCD_DAPM_MUX("WDMA3 PORT6 MUX", 6, wdma3_port6),



	WCD_DAPM_MUX("WDMA3 CH0 MUX", 0, wdma3_ch0),

	WCD_DAPM_MUX("WDMA3 CH1 MUX", 4, wdma3_ch1),

	WCD_DAPM_MUX("WDMA3 CH2 MUX", 0, wdma3_ch2),

	WCD_DAPM_MUX("WDMA3 CH3 MUX", 4, wdma3_ch3),



	SND_SOC_DAPM_MIXER("WDMA3_CH_MIXER", SND_SOC_NOPM, 0, 0, NULL, 0),



	SND_SOC_DAPM_SWITCH_E("WDMA3_ON_OFF", SND_SOC_NOPM, 0, 0,

			      &wdma3_onoff_switch, tavil_codec_wdma3_ctl,

			      SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),



	SND_SOC_DAPM_OUTPUT("WDMA3_OUT"),

};



static int tavil_get_channel_map(struct snd_soc_dai *dai,