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Commit 5c03b53c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:
 "All is about drivers, no core business going on.

   - Fix a host of runtime problems with the Intel Cherryview driver:
     suspend/resume needs to be marshalled properly, and strange effects
     from BIOS interaction during suspend/resume need to be dealt with.

   - A single bit was being set wrong in the Aspeed driver.

   - Fix an iProc probe ordering fallout resulting from v4.9
     refactorings for bus population.

   - Do not specify a default trigger in the ST Micro cascaded GPIO IRQ
     controller: the kernel will moan.

   - Make IRQs optional altogether on the STM32 driver, it turns out not
     all systems have them or want them.

   - Fix a re-probe bug in the i.MX driver, it will eventually crash if
     probed repeatedly, not good"

* tag 'pinctrl-v4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl-aspeed-g5: Never set SCU90[6]
  pinctrl: cherryview: Prevent possible interrupt storm on resume
  pinctrl: cherryview: Serialize register access in suspend/resume
  pinctrl: imx: reset group index on probe
  pinctrl: stm32: move gpio irqs binding to optional
  pinctrl: stm32: remove dependency with interrupt controller
  pinctrl: st: don't specify default interrupt trigger
  pinctrl: iproc: Fix iProc and NSP GPIO support
parents 015ed943 a33547cc

Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt

+5 −5
Original line number Diff line number Diff line
@@ -14,11 +14,6 @@ Required properies: 
 - #size-cells	: The value of this property must be 1

 - ranges	: defines mapping between pin controller node (parent) to

   gpio-bank node (children).

 - interrupt-parent: phandle of the interrupt parent to which the external

   GPIO interrupts are forwarded to.

 - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node

   which includes IRQ mux selection register, and the offset of the IRQ mux

   selection register.

 - pins-are-numbered: Specify the subnodes are using numbered pinmux to

   specify pins.
@@ -37,6 +32,11 @@ Required properties: 


Optional properties:

 - reset:	  : Reference to the reset controller

 - interrupt-parent: phandle of the interrupt parent to which the external

   GPIO interrupts are forwarded to.

 - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node

   which includes IRQ mux selection register, and the offset of the IRQ mux

   selection register.



Example:

#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

+1 −1
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 


#define ASPEED_G5_NR_PINS 228



#define COND1		SIG_DESC_BIT(SCU90, 6, 0)

#define COND1		{ SCU90, BIT(6), 0, 0 }

#define COND2		{ SCU94, GENMASK(1, 0), 0, 0 }



#define B14 0

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

+1 −1
Original line number Diff line number Diff line
@@ -844,6 +844,6 @@ static struct platform_driver iproc_gpio_driver = { 


static int __init iproc_gpio_init(void)

{

	return platform_driver_probe(&iproc_gpio_driver, iproc_gpio_probe);

	return platform_driver_register(&iproc_gpio_driver);

}

arch_initcall_sync(iproc_gpio_init);

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

+1 −1
Original line number Diff line number Diff line
@@ -741,6 +741,6 @@ static struct platform_driver nsp_gpio_driver = { 


static int __init nsp_gpio_init(void)

{

	return platform_driver_probe(&nsp_gpio_driver, nsp_gpio_probe);

	return platform_driver_register(&nsp_gpio_driver);

}

arch_initcall_sync(nsp_gpio_init);

drivers/pinctrl/freescale/pinctrl-imx.c

+1 −0
Original line number Diff line number Diff line
@@ -687,6 +687,7 @@ static int imx_pinctrl_probe_dt(struct platform_device *pdev, 
	if (!info->functions)

		return -ENOMEM;



	info->group_index = 0;

	if (flat_funcs) {

		info->ngroups = of_get_child_count(np);

	} else {