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Commit 5bfb10d7 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branches 'spi/fix/fsl-dspi', 'spi/fix/fsl-espi',... 

Merge remote-tracking branches 'spi/fix/fsl-dspi', 'spi/fix/fsl-espi', 'spi/fix/orion' and 'spi/fix/pl022' into spi-linus
parents 8757091b 9deef024 7a0a1759 ce2f6ea1 ea6055c4

Documentation/devicetree/bindings/spi/spi_pl022.txt

+1 −1
Original line number Diff line number Diff line
@@ -4,9 +4,9 @@ Required properties: 
- compatible : "arm,pl022", "arm,primecell"

- reg : Offset and length of the register set for the device

- interrupts : Should contain SPI controller interrupt

- num-cs : total number of chipselects



Optional properties:

- num-cs : total number of chipselects

- cs-gpios : should specify GPIOs used for chipselects.

  The gpios will be referred to as reg = <index> in the SPI child nodes.

  If unspecified, a single SPI device without a chip select can be used.

drivers/spi/spi-fsl-dspi.c

+2 −2
Original line number Diff line number Diff line
@@ -341,10 +341,10 @@ static int dspi_transfer_one_message(struct spi_master *master, 
		dspi->cur_msg = message;

		dspi->cur_chip = spi_get_ctldata(spi);

		dspi->cs = spi->chip_select;

		dspi->cs_change = 0;

		if (dspi->cur_transfer->transfer_list.next

				== &dspi->cur_msg->transfers)

			transfer->cs_change = 1;

		dspi->cs_change = transfer->cs_change;

			dspi->cs_change = 1;

		dspi->void_write_data = dspi->cur_chip->void_write_data;



		dspi->dataflags = 0;

drivers/spi/spi-fsl-espi.c

+5 −1
Original line number Diff line number Diff line
@@ -561,9 +561,13 @@ void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events) 


		/* spin until TX is done */

		ret = spin_event_timeout(((events = mpc8xxx_spi_read_reg(

				&reg_base->event)) & SPIE_NF) == 0, 1000, 0);

				&reg_base->event)) & SPIE_NF), 1000, 0);

		if (!ret) {

			dev_err(mspi->dev, "tired waiting for SPIE_NF\n");



			/* Clear the SPIE bits */

			mpc8xxx_spi_write_reg(&reg_base->event, events);

			complete(&mspi->done);

			return;

		}

	}

drivers/spi/spi-orion.c

+23 −2
Original line number Diff line number Diff line
@@ -61,6 +61,12 @@ enum orion_spi_type { 


struct orion_spi_dev {

	enum orion_spi_type	typ;

	/*

	 * min_divisor and max_hz should be exclusive, the only we can

	 * have both is for managing the armada-370-spi case with old

	 * device tree

	 */

	unsigned long		max_hz;

	unsigned int		min_divisor;

	unsigned int		max_divisor;

	u32			prescale_mask;
@@ -387,8 +393,9 @@ static const struct orion_spi_dev orion_spi_dev_data = { 


static const struct orion_spi_dev armada_spi_dev_data = {

	.typ = ARMADA_SPI,

	.min_divisor = 1,

	.min_divisor = 4,

	.max_divisor = 1920,

	.max_hz = 50000000,

	.prescale_mask = ARMADA_SPI_CLK_PRESCALE_MASK,

};
@@ -454,7 +461,21 @@ static int orion_spi_probe(struct platform_device *pdev) 
		goto out;



	tclk_hz = clk_get_rate(spi->clk);

	master->max_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->min_divisor);



	/*

	 * With old device tree, armada-370-spi could be used with

	 * Armada XP, however for this SoC the maximum frequency is

	 * 50MHz instead of tclk/4. On Armada 370, tclk cannot be

	 * higher than 200MHz. So, in order to be able to handle both

	 * SoCs, we can take the minimum of 50MHz and tclk/4.

	 */

	if (of_device_is_compatible(pdev->dev.of_node,

					"marvell,armada-370-spi"))

		master->max_speed_hz = min(devdata->max_hz,

				DIV_ROUND_UP(tclk_hz, devdata->min_divisor));

	else

		master->max_speed_hz =

			DIV_ROUND_UP(tclk_hz, devdata->min_divisor);

	master->min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->max_divisor);



	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);