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Commit 5b8eb326 authored by Prakash Gupta's avatar Prakash Gupta
Browse files

iommu: arm-smmu: move smmu options to dt bindings



Move smmu options to dt bindings so that same can be shared across dt and
source.

Change-Id: I36f791eacbea586ada3fb2fec869abd3ec6adc35
Signed-off-by: default avatarPrakash Gupta <guptap@codeaurora.org>
parent a063e527
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+1 −10
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@
#include <linux/ktime.h>
#include <trace/events/iommu.h>
#include <linux/notifier.h>
#include <dt-bindings/arm/arm-smmu.h>

#include <linux/amba/bus.h>
#include <soc/qcom/msm_tz_smmu.h>
@@ -433,16 +434,6 @@ struct arm_smmu_device {
#define ARM_SMMU_FEAT_FMT_AARCH32_S	(1 << 11)
	u32				features;

#define ARM_SMMU_OPT_SECURE_CFG_ACCESS (1 << 0)
#define ARM_SMMU_OPT_FATAL_ASF		(1 << 1)
#define ARM_SMMU_OPT_SKIP_INIT		(1 << 2)
#define ARM_SMMU_OPT_DYNAMIC		(1 << 3)
#define ARM_SMMU_OPT_3LVL_TABLES	(1 << 4)
#define ARM_SMMU_OPT_NO_ASID_RETENTION	(1 << 5)
#define ARM_SMMU_OPT_DISABLE_ATOS	(1 << 6)
#define ARM_SMMU_OPT_MMU500_ERRATA1	(1 << 7)
#define ARM_SMMU_OPT_STATIC_CB		(1 << 8)
#define ARM_SMMU_OPT_HALT		(1 << 9)
	u32				options;
	enum arm_smmu_arch_version	version;
	enum arm_smmu_implementation	model;
+27 −0
Original line number Diff line number Diff line
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __DT_ARM_SMMU_H__
#define __DT_ARM_SMMU_H__

#define ARM_SMMU_OPT_SECURE_CFG_ACCESS  (1 << 0)
#define ARM_SMMU_OPT_FATAL_ASF		(1 << 1)
#define ARM_SMMU_OPT_SKIP_INIT		(1 << 2)
#define ARM_SMMU_OPT_DYNAMIC		(1 << 3)
#define ARM_SMMU_OPT_3LVL_TABLES	(1 << 4)
#define ARM_SMMU_OPT_NO_ASID_RETENTION	(1 << 5)
#define ARM_SMMU_OPT_DISABLE_ATOS	(1 << 6)
#define ARM_SMMU_OPT_MMU500_ERRATA1	(1 << 7)
#define ARM_SMMU_OPT_STATIC_CB          (1 << 8)
#define ARM_SMMU_OPT_HALT               (1 << 9)

#endif