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Commit 5b5e00b5 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: sdm670: Enable compilation of regmap irq for sdm670"

parents 418c7b4c 5246bc1a
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Qualcomm Technologies, Inc. for AQT1000 audio CODEC

Required properties:

- compatible: "qcom,aqt1000-i2c-codec" for AQT1000 Codec

- qcom,aqt-rst-gpio-node: Phandle reference to the DT node having codec reset gpio
			  configuration.

- reg: Address of the codec. This property enabled I2C to get AQT1000 base address.

- qcom,cdc-static-supplies: Static VREG_BOB Supply for AQT1000 codec.
			    All other supplies are derived from this.

-qcom,cdc-micbias1-mv: micbias1 output voltage in milli volts.
		       This is used when cfilt is not user configurable
		       and micbias1 is directly controlled with a register
		       write.

-qcom,cdc-mclk-clk-rate: Specifies the master clock rate in Hz required for
			 codec.

Optional properties:

-qcom,cdc-ext-clk-rate: External clock frequency used for AQT1000.
			All internal clocks for AQT1000 are derived from this clock.
			If this property is not defined then default external
			clock rate of 9.6M will be provided.

- qcom,cdc-vdd-mic-bias-supply: phandle of vreg_bob supply's regulator device tree
			   node.

- qcom,cdc-vdd-mic-bias-voltage: vreg_bob supply's voltage level min and max
				 in mV.
- qcom,cdc-vdd-mic-bias-current: vreg_bob supply's max current in mA.

- qcom,cdc-micbias-ldoh-v: LDOH output in volts (should be 3V).

- qcom,cdc-micbias-cfilt1-mv: cfilt1 output voltage in milli volts.
  cfilt voltage can be set to max of qcom,cdc-micbias-ldoh-v - 0.15V.
- qcom,cdc-micbias1-cfilt-sel: cfilt to use for micbias1
			(should be from 1 to 3).

- clock-names : clock name defined for external clock.
- clocks : external clock defined for codec clock.

Example:
i2c@a88000 {
	status = "ok";
	aqt1000_cdc: aqt1000-i2c-codec@d {
		status = "disabled";
		compatible = "qcom,aqt1000-i2c-codec";
		reg = <0x0d>;

		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&tlmm>;
		qcom,gpio-connect = <&tlmm 79 0>;
		pinctrl-names = "default";
		pinctrl-0 = <&aqt_intr_default>;

		qcom,aqt-rst-gpio-node = <&aqt_rst_gpio>;

		qcom,cdc-vdd-mic-bias-supply = <&pm660l_bob>;
		qcom,cdc-vdd-mic-bias-voltage = <3312000 3312000>;
		qcom,cdc-vdd-mic-bias-current = <30400>;
		qcom,cdc-static-supplies = "cdc-vdd-mic-bias";

		qcom,cdc-micbias-ldoh-v = <3>;

		qcom,cdc-ext-clk-rate = <19200000>;
		qcom,cdc-mclk-clk-rate = <9600000>;

		qcom,cdc-micbias1-mv = <1800>;

		clock-names = "aqt_clk";
		clocks = <&clock_audio_lnbb AUDIO_PMIC_LNBB_CLK>;
	};
};
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@@ -1729,6 +1729,9 @@ Optional Properties:
- qcom,msm-mi2s-master: This property is used to inform machine driver
  if MSM is the clock master of mi2s. 1 means master and 0 means slave. The
  first entry is primary mi2s; the second entry is secondary mi2s, and so on.
- qcom,mi2s-aqt-enabled: This property is used to inform machine driver
  if AQT1000 codec is enabled or not. If this is enabled then codec name
  for TERT_MI2S needs to be overridden with AQT codec.
- qcom,msm-mi2s-ext-mclk: This property is used to inform machine driver
  if MCLK from MSM is used for any external audio connections. 1 means used
  as external mclk source and 0 indicate not used. The first entry is
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@@ -439,6 +439,7 @@ Optional properties:
				Value from 4000 to 5550 in mV in steps of 50 mV can be given.
 - qcom,dig-cdc-base-addr: Specifies the digital codec base address for MSM digital
				core register writes.
 - qcom,anlg-cdc-mbhc-disable: Boolean variable that informs if AQT1000 codec is enabled or not.

Example:

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@@ -244,6 +244,7 @@ CONFIG_NFC_NQ=y
CONFIG_IPC_ROUTER=y
CONFIG_IPC_ROUTER_SECURITY=y
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
CONFIG_AQT_REGMAP=y
CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS=y
CONFIG_DMA_CMA=y
CONFIG_ZRAM=y
+11 −0
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@@ -33,6 +33,17 @@ config REGMAP_IRQ
config REGMAP_SWR
	tristate

config AQT_REGMAP
	depends on SND_SOC
	bool "For regmap on AQT"
	select REGMAP_IRQ
	default n
	help
	   Say 'y' here to enable regmap_irq for aqt1000 codec.
	   This config is intended for enabling REGMAP_IRQ for
	   AQT1000 codec. AQT codec uses pm_runtime and calls
	   regmap_irq as a part of init.

config REGMAP_ALLOW_WRITE_DEBUGFS
	depends on REGMAP && DEBUG_FS
	bool "Allow REGMAP debugfs write"