Merge "drm/msm/sde: handle color processing in secure state" (5adbff53) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/drm/msm/sde/sde_crtc.c

+13 −1

Original line number	Diff line number	Diff line
		@@ -2392,6 +2392,7 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc,
		struct drm_encoder *encoder;
		struct drm_device *dev;
		unsigned long flags;
		struct sde_crtc_smmu_state_data *smmu_state;

		if (!crtc) {
		SDE_ERROR("invalid crtc\n");
		@@ -2408,6 +2409,7 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc,

		sde_crtc = to_sde_crtc(crtc);
		dev = crtc->dev;
		smmu_state = &sde_crtc->smmu_state;

		if (!sde_crtc->num_mixers) {
		_sde_crtc_setup_mixers(crtc);
		@@ -2440,6 +2442,16 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc,
		return;

		_sde_crtc_blend_setup(crtc);

		/*
		* Since CP properties use AXI buffer to program the
		* HW, check if context bank is in attached
		* state,
		* apply color processing properties only if
		* smmu state is attached,
		*/
		if ((smmu_state->state != DETACHED) \|\|
		(smmu_state->state != DETACH_ALL_REQ))
		sde_cp_crtc_apply_properties(crtc);

		/*

drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1.c

+59 −1

Original line number	Diff line number	Diff line
		@@ -582,6 +582,49 @@ int reset_v1(struct sde_hw_ctl *ctl)
		return 0;
		}

		static void sde_reg_dma_aspace_cb(void *cb_data, bool attach)
		{
		struct sde_reg_dma_buffer *dma_buf = NULL;
		struct msm_gem_address_space *aspace = NULL;
		u32 iova_aligned, offset;
		int rc;

		if (!cb_data) {
		DRM_ERROR("aspace cb called with invalid dma_buf\n");
		return;
		}

		dma_buf = (struct sde_reg_dma_buffer *)cb_data;
		aspace = dma_buf->aspace;

		if (attach) {
		rc = msm_gem_get_iova(dma_buf->buf, aspace, &dma_buf->iova);
		if (rc) {
		DRM_ERROR("failed to get the iova rc %d\n", rc);
		return;
		}

		dma_buf->vaddr = msm_gem_get_vaddr(dma_buf->buf);
		if (IS_ERR_OR_NULL(dma_buf->vaddr)) {
		DRM_ERROR("failed to get va rc %d\n", rc);
		return;
		}

		iova_aligned = (dma_buf->iova + GUARD_BYTES) & ALIGNED_OFFSET;
		offset = iova_aligned - dma_buf->iova;
		dma_buf->iova = dma_buf->iova + offset;
		dma_buf->vaddr = (void )(((u8 )dma_buf->vaddr) + offset);
		dma_buf->next_op_allowed = DECODE_SEL_OP;
		} else {
		/* invalidate the stored iova */
		dma_buf->iova = 0;

		/* return the virtual address mapping */
		msm_gem_put_vaddr(dma_buf->buf);
		msm_gem_vunmap(dma_buf->buf);
		}
		}

		static struct sde_reg_dma_buffer *alloc_reg_dma_buf_v1(u32 size)
		{
		struct sde_reg_dma_buffer *dma_buf = NULL;
		@@ -616,10 +659,20 @@ static struct sde_reg_dma_buffer *alloc_reg_dma_buf_v1(u32 size)
		goto free_gem;
		}

		/* register to aspace */
		rc = msm_gem_address_space_register_cb(aspace,
		sde_reg_dma_aspace_cb,
		(void *)dma_buf);
		if (rc) {
		DRM_ERROR("failed to register callback %d", rc);
		goto free_gem;
		}

		dma_buf->aspace = aspace;
		rc = msm_gem_get_iova(dma_buf->buf, aspace, &dma_buf->iova);
		if (rc) {
		DRM_ERROR("failed to get the iova rc %d\n", rc);
		goto free_gem;
		goto free_aspace_cb;
		}

		dma_buf->vaddr = msm_gem_get_vaddr(dma_buf->buf);
		@@ -640,6 +693,9 @@ static struct sde_reg_dma_buffer *alloc_reg_dma_buf_v1(u32 size)

		put_iova:
		msm_gem_put_iova(dma_buf->buf, aspace);
		free_aspace_cb:
		msm_gem_address_space_unregister_cb(aspace, sde_reg_dma_aspace_cb,
		dma_buf);
		free_gem:
		msm_gem_free_object(dma_buf->buf);
		fail:
		@@ -656,6 +712,8 @@ static int dealloc_reg_dma_v1(struct sde_reg_dma_buffer *dma_buf)

		if (dma_buf->buf) {
		msm_gem_put_iova(dma_buf->buf, 0);
		msm_gem_address_space_unregister_cb(dma_buf->aspace,
		sde_reg_dma_aspace_cb, dma_buf);
		mutex_lock(&reg_dma->drm_dev->struct_mutex);
		msm_gem_free_object(dma_buf->buf);
		mutex_unlock(&reg_dma->drm_dev->struct_mutex);

drivers/gpu/drm/msm/sde/sde_reg_dma.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -171,6 +171,7 @@ enum sde_reg_dma_blk {
		/**
		* struct sde_reg_dma_buffer - defines reg dma buffer structure.
		* @drm_gem_object *buf: drm gem handle for the buffer
		* @asapce : pointer to address space
		* @buffer_size: buffer size
		* @index: write pointer index
		* @iova: device address
		@@ -180,6 +181,7 @@ enum sde_reg_dma_blk {
		*/
		struct sde_reg_dma_buffer {
		struct drm_gem_object *buf;
		struct msm_gem_address_space *aspace;
		u32 buffer_size;
		u32 index;
		u32 iova;