Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 10 SUBLEVEL = 11 EXTRAVERSION = NAME = Roaring Lionus Loading arch/x86/kernel/fpu/core.c +2 −1 Original line number Diff line number Diff line Loading @@ -236,7 +236,8 @@ void fpstate_init(union fpregs_state *state) * it will #GP. Make sure it is replaced after the memset(). */ if (static_cpu_has(X86_FEATURE_XSAVES)) state->xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT; state->xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT | xfeatures_mask; if (static_cpu_has(X86_FEATURE_FXSR)) fpstate_init_fxstate(&state->fxsave); Loading drivers/net/ethernet/mellanox/mlx4/en_rx.c +4 −1 Original line number Diff line number Diff line Loading @@ -507,8 +507,11 @@ void mlx4_en_recover_from_oom(struct mlx4_en_priv *priv) return; for (ring = 0; ring < priv->rx_ring_num; ring++) { if (mlx4_en_is_ring_empty(priv->rx_ring[ring])) if (mlx4_en_is_ring_empty(priv->rx_ring[ring])) { local_bh_disable(); napi_reschedule(&priv->rx_cq[ring]->napi); local_bh_enable(); } } } Loading drivers/net/ethernet/mellanox/mlx5/core/en.h +2 −1 Original line number Diff line number Diff line Loading @@ -765,7 +765,8 @@ void mlx5e_disable_vlan_filter(struct mlx5e_priv *priv); int mlx5e_modify_rqs_vsd(struct mlx5e_priv *priv, bool vsd); int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, int ix); void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv); void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_priv *priv, void *tirc, enum mlx5e_traffic_types tt); int mlx5e_open_locked(struct net_device *netdev); int mlx5e_close_locked(struct net_device *netdev); Loading drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +8 −5 Original line number Diff line number Diff line Loading @@ -975,15 +975,18 @@ static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen) { struct mlx5_core_dev *mdev = priv->mdev; void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx); int i; struct mlx5_core_dev *mdev = priv->mdev; int ctxlen = MLX5_ST_SZ_BYTES(tirc); int tt; MLX5_SET(modify_tir_in, in, bitmask.hash, 1); mlx5e_build_tir_ctx_hash(tirc, priv); for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++) mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen); for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { memset(tirc, 0, ctxlen); mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt); mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen); } } static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir, Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 10 SUBLEVEL = 11 EXTRAVERSION = NAME = Roaring Lionus Loading
arch/x86/kernel/fpu/core.c +2 −1 Original line number Diff line number Diff line Loading @@ -236,7 +236,8 @@ void fpstate_init(union fpregs_state *state) * it will #GP. Make sure it is replaced after the memset(). */ if (static_cpu_has(X86_FEATURE_XSAVES)) state->xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT; state->xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT | xfeatures_mask; if (static_cpu_has(X86_FEATURE_FXSR)) fpstate_init_fxstate(&state->fxsave); Loading
drivers/net/ethernet/mellanox/mlx4/en_rx.c +4 −1 Original line number Diff line number Diff line Loading @@ -507,8 +507,11 @@ void mlx4_en_recover_from_oom(struct mlx4_en_priv *priv) return; for (ring = 0; ring < priv->rx_ring_num; ring++) { if (mlx4_en_is_ring_empty(priv->rx_ring[ring])) if (mlx4_en_is_ring_empty(priv->rx_ring[ring])) { local_bh_disable(); napi_reschedule(&priv->rx_cq[ring]->napi); local_bh_enable(); } } } Loading
drivers/net/ethernet/mellanox/mlx5/core/en.h +2 −1 Original line number Diff line number Diff line Loading @@ -765,7 +765,8 @@ void mlx5e_disable_vlan_filter(struct mlx5e_priv *priv); int mlx5e_modify_rqs_vsd(struct mlx5e_priv *priv, bool vsd); int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, int ix); void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv); void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_priv *priv, void *tirc, enum mlx5e_traffic_types tt); int mlx5e_open_locked(struct net_device *netdev); int mlx5e_close_locked(struct net_device *netdev); Loading
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +8 −5 Original line number Diff line number Diff line Loading @@ -975,15 +975,18 @@ static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen) { struct mlx5_core_dev *mdev = priv->mdev; void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx); int i; struct mlx5_core_dev *mdev = priv->mdev; int ctxlen = MLX5_ST_SZ_BYTES(tirc); int tt; MLX5_SET(modify_tir_in, in, bitmask.hash, 1); mlx5e_build_tir_ctx_hash(tirc, priv); for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++) mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen); for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { memset(tirc, 0, ctxlen); mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt); mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen); } } static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir, Loading