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Commit 5aad7456 authored by Dhaval Patel's avatar Dhaval Patel
Browse files

drm/msm/sde: parse csc type dtsi entry to select valid csc 



msm8998 supports 10bit csc while msm8996 supports csc only.
This patch adds the dtsi entry to select the correct csc
type while parsing hardware catalog to configure the
valid csc hardware block.

Change-Id: I376f1e485a5de4a95d03e395e06d10b043036cb0
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent 13485f1e

Documentation/devicetree/bindings/display/msm/sde.txt

+4 −0
Original line number Diff line number Diff line
@@ -109,6 +109,9 @@ Optional properties: 
				It supports "qssedv3" and "qseedv2" entries for qseed

				type. By default "qseedv2" is used if this optional property

				is not defined.

- qcom,sde-csc-type:		A string entry indicates csc support on sspp and wb.

				It supports "csc" and "csc-10bit" entries for csc

				type.

- qcom,sde-highest-bank-bit:	A u32 property to indicate GPU/Camera/Video highest memory

				bank bit used for tile format buffers.

- qcom,sde-panic-per-pipe:	Boolean property to indicate if panic signal
@@ -349,6 +352,7 @@ Example: 
    qcom,sde-sspp-scale-size = <0x100>;

    qcom,sde-mixer-blendstages = <0x8>;

    qcom,sde-qseed-type = "qseedv2";

    qcom,sde-csc-type = "csc-10bit";

    qcom,sde-highest-bank-bit = <15>;

    qcom,sde-has-mixer-gc;

    qcom,sde-sspp-max-rects = <1 1 1 1

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+17 −2
Original line number Diff line number Diff line
@@ -101,6 +101,7 @@ enum sde_prop { 
	WB_LINEWIDTH,

	BANK_BIT,

	QSEED_TYPE,

	CSC_TYPE,

	PANIC_PER_PIPE,

	CDP,

	SRC_SPLIT,
@@ -262,6 +263,7 @@ static struct sde_prop_type sde_prop[] = { 
	{WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32},

	{BANK_BIT, "qcom,sde-highest-bank-bit", false, PROP_TYPE_U32},

	{QSEED_TYPE, "qcom,sde-qseed-type", false, PROP_TYPE_STRING},

	{CSC_TYPE, "qcom,sde-csc-type", false, PROP_TYPE_STRING},

	{PANIC_PER_PIPE, "qcom,sde-panic-per-pipe", false, PROP_TYPE_BOOL},

	{CDP, "qcom,sde-has-cdp", false, PROP_TYPE_BOOL},

	{SRC_SPLIT, "qcom,sde-has-src-split", false, PROP_TYPE_BOOL},
@@ -663,8 +665,15 @@ static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg, 
	}



	sblk->csc_blk.id = SDE_SSPP_CSC;

	if (sde_cfg->csc_type == SDE_SSPP_CSC) {

		set_bit(SDE_SSPP_CSC, &sspp->features);

	sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value, VIG_CSC_OFF, 0);

		sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value,

							VIG_CSC_OFF, 0);

	} else if (sde_cfg->csc_type == SDE_SSPP_CSC_10BIT) {

		set_bit(SDE_SSPP_CSC_10BIT, &sspp->features);

		sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value,

							VIG_CSC_OFF, 0);

	}



	sblk->hsic_blk.id = SDE_SSPP_HSIC;

	if (prop_exists[VIG_HSIC_PROP]) {
@@ -1811,6 +1820,12 @@ static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) 
	else if (!rc && !strcmp(type, "qseedv2"))

		cfg->qseed_type = SDE_SSPP_SCALER_QSEED2;



	rc = of_property_read_string(np, sde_prop[CSC_TYPE].prop_name, &type);

	if (!rc && !strcmp(type, "csc"))

		cfg->csc_type = SDE_SSPP_CSC;

	else if (!rc && !strcmp(type, "csc-10bit"))

		cfg->csc_type = SDE_SSPP_CSC_10BIT;



	cfg->has_src_split = PROP_VALUE_ACCESS(prop_value, SRC_SPLIT, 0);

end:

	kfree(prop_value);

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -609,6 +609,7 @@ struct sde_vbif_cfg { 
 * @max_wb_linewidth   max writeback line width support.

 * @highest_bank_bit   highest memory bit setting for tile buffers.

 * @qseed_type         qseed2 or qseed3 support.

 * @csc_type           csc or csc_10bit support.

 * @has_src_split      source split feature status

 * @has_cdp            Client driver prefetch feature status

 */
@@ -621,6 +622,7 @@ struct sde_mdss_cfg { 
	u32 max_wb_linewidth;

	u32 highest_bank_bit;

	u32 qseed_type;

	u32 csc_type;

	bool has_src_split;

	bool has_cdp;