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Commit 5a846aba authored by Rich Felker's avatar Rich Felker
Browse files

sh: add support for J-Core J2 processor 



At the CPU/ISA level, the J2 is compatible with SH-2, and thus the
changes to add J2 support build on existing SH-2 support. However, J2
does not duplicate the memory-mapped SH-2 features like the cache
interface. Instead, the cache interfaces is described in the device
tree, and new code is added to be able to access the flat device tree
at early boot before it is unflattened.

Support is also added for receiving interrupts on trap numbers in the
range 16 to 31, since the J-Core aic1 interrupt controller generates
these traps. This range was unused but nominally for hardware
exceptions on SH-2, and a few values in this range were used for
exceptions on SH-2A, but SH-2A has its own version of the relevant
code.

No individual cpu subtypes are added for J2 since the intent moving
forward is to represent SoCs with device tree rather than as
hard-coded subtypes in the kernel. The CPU_SUBTYPE_J2 Kconfig item
exists only to fit into the existing cpu selection mechanism until it
is overhauled.

Signed-off-by: default avatarRich Felker <dalias@libc.org>
parent 03767daa

arch/sh/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -186,6 +186,12 @@ config CPU_SH2A 
	select CPU_SH2

	select UNCACHED_MAPPING



config CPU_J2

	bool

	select CPU_SH2

	select OF

	select OF_EARLY_FLATTREE



config CPU_SH3

	bool

	select CPU_HAS_INTEVT
@@ -252,6 +258,10 @@ config CPU_SUBTYPE_SH7619 
	select CPU_SH2

	select SYS_SUPPORTS_SH_CMT



config CPU_SUBTYPE_J2

	bool "Support J2 processor"

	select CPU_J2



# SH-2A Processor Support



config CPU_SUBTYPE_SH7201

arch/sh/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ isa-y := $(isa-y)-up 
endif



cflags-$(CONFIG_CPU_SH2)		:= $(call cc-option,-m2,)

cflags-$(CONFIG_CPU_J2)			:= $(call cc-option,-mj2,)

cflags-$(CONFIG_CPU_SH2A)		+= $(call cc-option,-m2a,) \

					   $(call cc-option,-m2a-nofpu,) \

					   $(call cc-option,-m4-nofpu,)

arch/sh/include/asm/processor.h

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ 
 */

enum cpu_type {

	/* SH-2 types */

	CPU_SH7619,

	CPU_SH7619, CPU_J2,



	/* SH-2A types */

	CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_SH7264, CPU_SH7269,

arch/sh/kernel/cpu/init.c

+1 −1
Original line number Diff line number Diff line
@@ -106,7 +106,7 @@ void __attribute__ ((weak)) l2_cache_init(void) 
/*

 * Generic first-level cache init

 */

#ifdef CONFIG_SUPERH32

#if defined(CONFIG_SUPERH32) && !defined(CONFIG_CPU_J2)

static void cache_init(void)

{

	unsigned long ccr, flags;

arch/sh/kernel/cpu/proc.c

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ static const char *cpu_name[] = { 
	[CPU_MXG]	= "MX-G",	[CPU_SH7723]	= "SH7723",

	[CPU_SH7366]	= "SH7366",	[CPU_SH7724]	= "SH7724",

	[CPU_SH7372]	= "SH7372",	[CPU_SH7734]	= "SH7734",

	[CPU_J2]	= "J2",

	[CPU_SH_NONE]	= "Unknown"

};