Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 59a8c10b authored by Gabor Juhos's avatar Gabor Juhos Committed by Ralf Baechle
Browse files

MIPS: ath79: Use ath79_get_sys_clk_rate to get basic clock rates 



Instead of accessing the rate field of the static
clock devices directly, use the recently introduced
helper function to get the rate of the basic clocks.

The static ath79_{ahb,cpu,ddr,ref}_clk variables
will be removed by a subsequent patch. The actual
change is in preparation of that.

Also move the clock frequency printing code into
the plat_time_init function. We are getting the
cpu clock rate there already so we can save an
extra call of the helper.

Signed-off-by: default avatarGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5782/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 23107802

arch/mips/ath79/clock.c

+0 −11
Original line number Diff line number Diff line
@@ -387,17 +387,6 @@ void __init ath79_clocks_init(void) 
		qca955x_clocks_init();

	else

		BUG();



	pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, "

		"Ref:%lu.%03luMHz",

		ath79_cpu_clk.rate / 1000000,

		(ath79_cpu_clk.rate / 1000) % 1000,

		ath79_ddr_clk.rate / 1000000,

		(ath79_ddr_clk.rate / 1000) % 1000,

		ath79_ahb_clk.rate / 1000000,

		(ath79_ahb_clk.rate / 1000) % 1000,

		ath79_ref_clk.rate / 1000000,

		(ath79_ref_clk.rate / 1000) % 1000);

}



unsigned long __init

arch/mips/ath79/setup.c

+12 −0
Original line number Diff line number Diff line
@@ -210,8 +210,20 @@ void __init plat_mem_setup(void) 
void __init plat_time_init(void)

{

	unsigned long cpu_clk_rate;

	unsigned long ahb_clk_rate;

	unsigned long ddr_clk_rate;

	unsigned long ref_clk_rate;



	cpu_clk_rate = ath79_get_sys_clk_rate("cpu");

	ahb_clk_rate = ath79_get_sys_clk_rate("ahb");

	ddr_clk_rate = ath79_get_sys_clk_rate("ddr");

	ref_clk_rate = ath79_get_sys_clk_rate("ref");



	pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz",

		cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,

		ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,

		ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,

		ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);



	mips_hpt_frequency = cpu_clk_rate / 2;

}