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Commit 59911568 authored by Giuseppe CAVALLARO's avatar Giuseppe CAVALLARO Committed by Chris Ball
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mmc: sdhci: fix ctrl_2 on super-speed selection 



This patch fixes the HC ctrl_2 programming where, in case of
SDR104 and HS200, we have to write 100b in the the UHS Mode
bits. We wrote 101b that is reserved from Arasan Specs.

Reported-by: default avatarYoussef Triki <youssef.triki@st.com>
Signed-off-by: default avatarGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent c73e41c8

drivers/mmc/host/sdhci.c

+3 −4
Original line number Diff line number Diff line
@@ -1543,16 +1543,15 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) 
			ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);

			/* Select Bus Speed Mode for host */

			ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;

			if (ios->timing == MMC_TIMING_MMC_HS200)

				ctrl_2 |= SDHCI_CTRL_HS_SDR200;

			if ((ios->timing == MMC_TIMING_MMC_HS200) ||

			    (ios->timing == MMC_TIMING_UHS_SDR104))

				ctrl_2 |= SDHCI_CTRL_UHS_SDR104;

			else if (ios->timing == MMC_TIMING_UHS_SDR12)

				ctrl_2 |= SDHCI_CTRL_UHS_SDR12;

			else if (ios->timing == MMC_TIMING_UHS_SDR25)

				ctrl_2 |= SDHCI_CTRL_UHS_SDR25;

			else if (ios->timing == MMC_TIMING_UHS_SDR50)

				ctrl_2 |= SDHCI_CTRL_UHS_SDR50;

			else if (ios->timing == MMC_TIMING_UHS_SDR104)

				ctrl_2 |= SDHCI_CTRL_UHS_SDR104;

			else if (ios->timing == MMC_TIMING_UHS_DDR50)

				ctrl_2 |= SDHCI_CTRL_UHS_DDR50;

			sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);