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Commit 591d14f0 authored by Dylan Reid's avatar Dylan Reid Committed by Mark Brown
Browse files

ASoC: tegra: Use flat regcache 



When using an rbtree cache, there can be allocations the first time a
register is accessed.  This can cause an attempt to schedule while
atomic in the case that the regmap is using a spinlock.  This could be
fixed by either initializing all the registers or using a flat cache.
The register maps for tegra30_ahub and tegra30_i2s are dense and don't
save much from using a tree so convert them to flat.

Tegra30 changes tested on Norrin, Tegra20 changes compile.

Signed-off-by: default avatarDylan Reid <dgreid@chromium.org>
Tested-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 38dbfb59

sound/soc/tegra/tegra20_ac97.c

+1 −1
Original line number Diff line number Diff line
@@ -306,7 +306,7 @@ static const struct regmap_config tegra20_ac97_regmap_config = { 
	.readable_reg = tegra20_ac97_wr_rd_reg,

	.volatile_reg = tegra20_ac97_volatile_reg,

	.precious_reg = tegra20_ac97_precious_reg,

	.cache_type = REGCACHE_RBTREE,

	.cache_type = REGCACHE_FLAT,

};



static int tegra20_ac97_platform_probe(struct platform_device *pdev)

sound/soc/tegra/tegra20_das.c

+1 −1
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ static const struct regmap_config tegra20_das_regmap_config = { 
	.max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),

	.writeable_reg = tegra20_das_wr_rd_reg,

	.readable_reg = tegra20_das_wr_rd_reg,

	.cache_type = REGCACHE_RBTREE,

	.cache_type = REGCACHE_FLAT,

};



static int tegra20_das_probe(struct platform_device *pdev)

sound/soc/tegra/tegra20_i2s.c

+1 −1
Original line number Diff line number Diff line
@@ -333,7 +333,7 @@ static const struct regmap_config tegra20_i2s_regmap_config = { 
	.readable_reg = tegra20_i2s_wr_rd_reg,

	.volatile_reg = tegra20_i2s_volatile_reg,

	.precious_reg = tegra20_i2s_precious_reg,

	.cache_type = REGCACHE_RBTREE,

	.cache_type = REGCACHE_FLAT,

};



static int tegra20_i2s_platform_probe(struct platform_device *pdev)

sound/soc/tegra/tegra20_spdif.c

+1 −1
Original line number Diff line number Diff line
@@ -259,7 +259,7 @@ static const struct regmap_config tegra20_spdif_regmap_config = { 
	.readable_reg = tegra20_spdif_wr_rd_reg,

	.volatile_reg = tegra20_spdif_volatile_reg,

	.precious_reg = tegra20_spdif_precious_reg,

	.cache_type = REGCACHE_RBTREE,

	.cache_type = REGCACHE_FLAT,

};



static int tegra20_spdif_platform_probe(struct platform_device *pdev)

sound/soc/tegra/tegra30_ahub.c

+2 −2
Original line number Diff line number Diff line
@@ -471,7 +471,7 @@ static const struct regmap_config tegra30_ahub_apbif_regmap_config = { 
	.readable_reg = tegra30_ahub_apbif_wr_rd_reg,

	.volatile_reg = tegra30_ahub_apbif_volatile_reg,

	.precious_reg = tegra30_ahub_apbif_precious_reg,

	.cache_type = REGCACHE_RBTREE,

	.cache_type = REGCACHE_FLAT,

};



static bool tegra30_ahub_ahub_wr_rd_reg(struct device *dev, unsigned int reg)
@@ -490,7 +490,7 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = { 
	.max_register = LAST_REG(AUDIO_RX),

	.writeable_reg = tegra30_ahub_ahub_wr_rd_reg,

	.readable_reg = tegra30_ahub_ahub_wr_rd_reg,

	.cache_type = REGCACHE_RBTREE,

	.cache_type = REGCACHE_FLAT,

};



static struct tegra30_ahub_soc_data soc_data_tegra30 = {