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Commit 58eb1df2 authored by Hemant Kumar's avatar Hemant Kumar Committed by Mayank Rana
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usb: dwc3: Prevent pipe_PowerDown transition during U1 exit 



During U1 exit, the controller might send LFPS ping at the same
time when the P1 to P0 transition occurs(GUSB3PIPECTL[27] = '0').
The de-assertion of the pipe_TxElecIdle signal during the
pipe_PowerDown signal transition violates the PIPE specification.
Fix this by setting GUSB3PIPECTL[27] = '1' so that there is no
pipe_PowerDown transition during U1 exit. This fix is applicable
for DWC3 revision 3.10 or older.

Change-Id: I7708d42c0f8b67d315be59e9ff9f04ccb74b9b5c
Signed-off-by: default avatarHemant Kumar <hemantk@codeaurora.org>
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
parent e4f2781b

drivers/usb/dwc3/core.c

+5 −0
Original line number Diff line number Diff line
@@ -249,6 +249,11 @@ static int dwc3_core_reset(struct dwc3 *dwc) 


	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));

	reg &= ~DWC3_GUSB3PIPECTL_DELAYP1TRANS;



	/* core exits U1/U2/U3 only in PHY power state P1/P2/P3 respectively */

	if (dwc->revision <= DWC3_REVISION_310A)

		reg |= DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX;



	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);



	dwc3_notify_event(dwc, DWC3_CONTROLLER_RESET_EVENT);

drivers/usb/dwc3/core.h

+1 −0
Original line number Diff line number Diff line
@@ -243,6 +243,7 @@ 
#define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)

#define DWC3_GUSB3PIPECTL_U2SSINP3OK	(1 << 29)

#define DWC3_GUSB3PIPECTL_DISRXDETINP3	(1 << 28)

#define DWC3_GUSB3PIPECTL_UX_EXIT_IN_PX	(1 << 27)

#define DWC3_GUSB3PIPECTL_REQP1P2P3	(1 << 24)

#define DWC3_GUSB3PIPECTL_DEP1P2P3(n)	((n) << 19)

#define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK	DWC3_GUSB3PIPECTL_DEP1P2P3(7)