Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 58e6c7a9 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau: introduce new gart type, and name _SGDMA more appropriately 



In preparation for the addition of a new nv40 backend, we'll need to be
able to distinguish between a paged dma object and the on-chip GART.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent efa58db3

drivers/gpu/drm/nouveau/nouveau_bo.c

+4 −2
Original line number Original line Diff line number Diff line
@@ -382,7 +382,8 @@ nouveau_bo_create_ttm_backend_entry(struct ttm_bo_device *bdev) 
	case NOUVEAU_GART_AGP:

	case NOUVEAU_GART_AGP:

		return ttm_agp_backend_init(bdev, dev->agp->bridge);

		return ttm_agp_backend_init(bdev, dev->agp->bridge);

#endif

#endif

	case NOUVEAU_GART_SGDMA:

	case NOUVEAU_GART_PDMA:

	case NOUVEAU_GART_HW:

		return nouveau_sgdma_init_ttm(dev);

		return nouveau_sgdma_init_ttm(dev);

	default:

	default:

		NV_ERROR(dev, "Unknown GART type %d\n",

		NV_ERROR(dev, "Unknown GART type %d\n",
@@ -436,7 +437,8 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, 
				TTM_PL_FLAG_WC;

				TTM_PL_FLAG_WC;

			man->default_caching = TTM_PL_FLAG_WC;

			man->default_caching = TTM_PL_FLAG_WC;

			break;

			break;

		case NOUVEAU_GART_SGDMA:

		case NOUVEAU_GART_PDMA:

		case NOUVEAU_GART_HW:

			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |

			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |

				     TTM_MEMTYPE_FLAG_CMA;

				     TTM_MEMTYPE_FLAG_CMA;

			man->available_caching = TTM_PL_MASK_CACHING;

			man->available_caching = TTM_PL_MASK_CACHING;

drivers/gpu/drm/nouveau/nouveau_drv.h

+3 −2
Original line number Original line Diff line number Diff line
@@ -691,8 +691,9 @@ struct drm_nouveau_private { 
	struct {

	struct {

		enum {

		enum {

			NOUVEAU_GART_NONE = 0,

			NOUVEAU_GART_NONE = 0,

			NOUVEAU_GART_AGP,

			NOUVEAU_GART_AGP,	/* AGP */

			NOUVEAU_GART_SGDMA

			NOUVEAU_GART_PDMA,	/* paged dma object */

			NOUVEAU_GART_HW		/* on-chip gart/vm */

		} type;

		} type;

		uint64_t aper_base;

		uint64_t aper_base;

		uint64_t aper_size;

		uint64_t aper_size;

drivers/gpu/drm/nouveau/nouveau_object.c

+14 −8
Original line number Original line Diff line number Diff line
@@ -490,16 +490,22 @@ nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class, u64 base, 
	}

	}





	if (target == NV_MEM_TARGET_GART) {

	if (target == NV_MEM_TARGET_GART) {

		if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {

		struct nouveau_gpuobj *gart = dev_priv->gart_info.sg_ctxdma;

			target = NV_MEM_TARGET_PCI_NOSNOOP;



			base  += dev_priv->gart_info.aper_base;

		if (dev_priv->gart_info.type == NOUVEAU_GART_PDMA) {

		} else

			if (base == 0) {

		if (base != 0) {

				nouveau_gpuobj_ref(gart, pobj);

				return 0;

			}



			base   = nouveau_sgdma_get_physical(dev, base);

			base   = nouveau_sgdma_get_physical(dev, base);

			target = NV_MEM_TARGET_PCI;

			target = NV_MEM_TARGET_PCI;

		} else {

		} else {

			nouveau_gpuobj_ref(dev_priv->gart_info.sg_ctxdma, pobj);

			base += dev_priv->gart_info.aper_base;

			return 0;

			if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)

				target = NV_MEM_TARGET_PCI_NOSNOOP;

			else

				target = NV_MEM_TARGET_PCI;

		}

		}

	}

	}

drivers/gpu/drm/nouveau/nouveau_sgdma.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -237,6 +237,7 @@ nouveau_sgdma_init(struct drm_device *dev) 




		dev_priv->gart_info.aper_base = dev_priv->gart_info.vma.offset;

		dev_priv->gart_info.aper_base = dev_priv->gart_info.vma.offset;

		dev_priv->gart_info.aper_size = 512 * 1024 * 1024;

		dev_priv->gart_info.aper_size = 512 * 1024 * 1024;

		dev_priv->gart_info.type = NOUVEAU_GART_HW;

	} else {

	} else {

		if(dev_priv->ramin_rsvd_vram < 2 * 1024 * 1024)

		if(dev_priv->ramin_rsvd_vram < 2 * 1024 * 1024)

			aper_size = 64 * 1024 * 1024;

			aper_size = 64 * 1024 * 1024;
@@ -266,9 +267,9 @@ nouveau_sgdma_init(struct drm_device *dev) 
		dev_priv->gart_info.sg_ctxdma = gpuobj;

		dev_priv->gart_info.sg_ctxdma = gpuobj;

		dev_priv->gart_info.aper_base = 0;

		dev_priv->gart_info.aper_base = 0;

		dev_priv->gart_info.aper_size = aper_size;

		dev_priv->gart_info.aper_size = aper_size;

		dev_priv->gart_info.type = NOUVEAU_GART_PDMA;

	}

	}





	dev_priv->gart_info.type      = NOUVEAU_GART_SGDMA;

	return 0;

	return 0;

}

}