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Commit 5854a3c6 authored by Santhosh Kumar Thimmanna Bhattar's avatar Santhosh Kumar Thimmanna Bhattar Committed by Gerrit - the friendly Code Review server
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msm: camera: sensor: Enable csiphy version 3.4.2.1 on 8940 



Enabled csiphy version 3.4.2.1 and added corresponding changes
to enable camera on 8940.

Change-Id: Ib0b0a51761b0e64ccb84fbf750faaa494deea1b7
Signed-off-by: default avatarSanthosh Kumar Thimmanna Bhattar <sthim@codeaurora.org>
parent da868b42

drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_3_4_2_1_hwreg.h

0 → 100644
+95 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2016, 2018 The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef MSM_CSIPHY_3_4_2_1_HWREG_H

#define MSM_CSIPHY_3_4_2_1_HWREG_H



#define ULPM_WAKE_UP_TIMER_MODE                   2

#define GLITCH_ELIMINATION_NUM                    0x12 /* bit [6:4] */



#include <sensor/csiphy/msm_csiphy.h>



static struct csiphy_reg_parms_t csiphy_v3_4_2_1 = {

	.mipi_csiphy_interrupt_status0_addr = 0x8B0,

	.mipi_csiphy_interrupt_clear0_addr = 0x858,

	.mipi_csiphy_glbl_irq_cmd_addr = 0x828,

	.combo_clk_mask = 0x10,

};



static struct csiphy_reg_3ph_parms_t csiphy_v3_4_2_1_3ph = {

	/*MIPI CSI PHY registers*/

	{0x814, 0x0},

	{0x818, 0x1},

	{0x188, 0x7F},

	{0x18C, 0x7F},

	{0x190, 0x0},

	{0x104, 0x6},

	{0x108, 0x0},

	{0x10c, 0x0},

	{0x114, 0x20},

	{0x118, 0x3E},

	{0x11c, 0x41},

	{0x120, 0x41},

	{0x124, 0x7F},

	{0x128, 0x0},

	{0x12c, 0x0},

	{0x130, 0x1},

	{0x134, 0x0},

	{0x138, 0x0},

	{0x13C, 0x10},

	{0x140, 0x1},

	{0x144, GLITCH_ELIMINATION_NUM},

	{0x148, 0xFE},

	{0x14C, 0x1},

	{0x154, 0x0},

	{0x15C, 0x33},

	{0x160, ULPM_WAKE_UP_TIMER_MODE},

	{0x164, 0x48},

	{0x168, 0xA0},

	{0x16C, 0x17},

	{0x170, 0x41},

	{0x174, 0x41},

	{0x178, 0x3E},

	{0x17C, 0x0},

	{0x180, 0x0},

	{0x184, 0x7F},

	{0x1cc, 0x10},

	{0x81c, 0x6},

	{0x82c, 0xFF},

	{0x830, 0xFF},

	{0x834, 0xFB},

	{0x838, 0xFF},

	{0x83c, 0x7F},

	{0x840, 0xFF},

	{0x844, 0xFF},

	{0x848, 0xEF},

	{0x84c, 0xFF},

	{0x850, 0xFF},

	{0x854, 0xFF},

	{0x28, 0x0},

	{0x800, 0x2},

	{0x0, 0x88},

	{0x4, 0x8},

	{0x8, 0x0},

	{0xC, 0xFF},

	{0x10, 0x56},

	{0x2C, 0x1},

	{0x30, 0x0},

	{0x34, 0x3},

	{0x38, 0xfe},

	{0x3C, 0xB8},

	{0x1C, 0xE7},

	{0x14, 0x0},

	{0x14, 0x60},

	{0x700, 0x80}

};

#endif

drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c

+31 −7
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include "include/msm_csiphy_3_1_hwreg.h"

#include "include/msm_csiphy_3_2_hwreg.h"

#include "include/msm_csiphy_3_4_2_hwreg.h"

#include "include/msm_csiphy_3_4_2_1_hwreg.h"

#include "include/msm_csiphy_3_5_hwreg.h"

#include "include/msm_csiphy_5_0_hwreg.h"

#include "include/msm_csiphy_5_0_1_hwreg.h"
@@ -43,6 +44,7 @@ 
#define CSIPHY_VERSION_V31                        0x31

#define CSIPHY_VERSION_V32                        0x32

#define CSIPHY_VERSION_V342                       0x342

#define CSIPHY_VERSION_V342_1                     0x3421

#define CSIPHY_VERSION_V35                        0x35

#define CSIPHY_VERSION_V50                        0x500

#define CSIPHY_VERSION_V501                       0x501
@@ -940,6 +942,13 @@ static int msm_csiphy_2phase_lane_config( 


	csiphybase = csiphy_dev->base;

	lane_mask = csiphy_params->lane_mask & 0x1f;



	if (csiphy_dev->hw_version == CSIPHY_VERSION_V342_1) {

		lane_enable = msm_camera_io_r(csiphybase +

			csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_3ph_cmn_ctrl5.addr);

	}



	for (i = 0; i < MAX_DPHY_DATA_LN; i++) {

		if (mask == 0x2) {

			if (lane_mask & mask)
@@ -1030,7 +1039,8 @@ static int msm_csiphy_2phase_lane_config( 
				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg1.addr + offset);

		}

		if (csiphy_dev->hw_version == CSIPHY_VERSION_V342 &&

		if ((csiphy_dev->hw_version == CSIPHY_VERSION_V342 ||

		    csiphy_dev->hw_version == CSIPHY_VERSION_V342_1) &&

			csiphy_params->combo_mode == 1) {

			msm_camera_io_w(0x52,

				csiphybase +
@@ -1044,7 +1054,8 @@ static int msm_csiphy_2phase_lane_config( 
				mipi_csiphy_2ph_lnn_cfg5.addr + offset);

		}

		if (clk_lane == 1  &&

			csiphy_dev->hw_version == CSIPHY_VERSION_V342) {

			(csiphy_dev->hw_version == CSIPHY_VERSION_V342 ||

			csiphy_dev->hw_version == CSIPHY_VERSION_V342_1)) {

			msm_camera_io_w(0x1f,

				csiphybase +

				csiphy_dev->ctrl_reg->csiphy_3ph_reg.
@@ -1060,7 +1071,8 @@ static int msm_csiphy_2phase_lane_config( 
			mipi_csiphy_2ph_lnn_test_imp.data,

			csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg.

			mipi_csiphy_2ph_lnn_test_imp.addr + offset);

		if (csiphy_dev->hw_version == CSIPHY_VERSION_V342) {

		if ((csiphy_dev->hw_version == CSIPHY_VERSION_V342 ||

			csiphy_dev->hw_version == CSIPHY_VERSION_V342_1)) {

			msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_ctrl5.data,

				csiphybase +
@@ -1069,7 +1081,8 @@ static int msm_csiphy_2phase_lane_config( 
		}

		mask <<= 1;

	}

	if (csiphy_dev->hw_version == CSIPHY_VERSION_V342 &&

	if ((csiphy_dev->hw_version == CSIPHY_VERSION_V342 ||

		csiphy_dev->hw_version == CSIPHY_VERSION_V342_1) &&

		csiphy_params->combo_mode != 1) {

		msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

			mipi_csiphy_3ph_cmn_ctrl0.data,
@@ -1305,7 +1318,8 @@ static int msm_csiphy_lane_config(struct csiphy_device *csiphy_dev, 


	if (csiphy_dev->hw_version >= CSIPHY_VERSION_V30 &&

		csiphy_dev->clk_mux_base != NULL &&

		csiphy_dev->hw_version < CSIPHY_VERSION_V50) {

		(csiphy_dev->hw_version == CSIPHY_VERSION_V342_1 ||

		csiphy_dev->hw_version < CSIPHY_VERSION_V50)) {

		val = msm_camera_io_r(csiphy_dev->clk_mux_base);

		if (csiphy_params->combo_mode &&

			(csiphy_params->lane_mask & 0x18) == 0x18) {
@@ -1336,7 +1350,11 @@ static int msm_csiphy_lane_config(struct csiphy_device *csiphy_dev, 
					csiphy_params);

			csiphy_dev->num_irq_registers = 20;

		} else {

			if (csiphy_dev->hw_dts_version >= CSIPHY_VERSION_V50)

			if (csiphy_dev->hw_dts_version == CSIPHY_VERSION_V342_1)

				rc = msm_csiphy_2phase_lane_config(csiphy_dev,

					csiphy_params);

			else if (csiphy_dev->hw_dts_version >=

					CSIPHY_VERSION_V50)

				rc = msm_csiphy_2phase_lane_config_v50(

					csiphy_dev, csiphy_params);

			else
@@ -2379,6 +2397,12 @@ static int csiphy_probe(struct platform_device *pdev) 
		new_csiphy_dev->ctrl_reg->csiphy_reg = csiphy_v3_4_2;

		new_csiphy_dev->hw_dts_version = CSIPHY_VERSION_V342;

		new_csiphy_dev->csiphy_3phase = CSI_3PHASE_HW;

	} else if (of_device_is_compatible(new_csiphy_dev->pdev->dev.of_node,

		"qcom,csiphy-v3.4.2.1")) {

		new_csiphy_dev->ctrl_reg->csiphy_3ph_reg = csiphy_v3_4_2_1_3ph;

		new_csiphy_dev->ctrl_reg->csiphy_reg = csiphy_v3_4_2_1;

		new_csiphy_dev->hw_dts_version = CSIPHY_VERSION_V342_1;

		new_csiphy_dev->csiphy_3phase = CSI_3PHASE_HW;

	} else if (of_device_is_compatible(new_csiphy_dev->pdev->dev.of_node,

		"qcom,csiphy-v3.5")) {

		new_csiphy_dev->ctrl_reg->csiphy_3ph_reg = csiphy_v3_5_3ph;