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Commit 580d3811 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915/chv: Reset data lanes in encoder .post_disable() hook 



Seems like we shouldn't leave the data lane resert deasserted when
the port if disabled. So propagate the reset the data lanes in
the encoder .post_disable() hook.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d752048d

drivers/gpu/drm/i915/intel_display.c

+1 −6
Original line number Diff line number Diff line
@@ -5515,7 +5515,7 @@ static void chv_update_pll(struct intel_crtc *crtc) 
	int pipe = crtc->pipe;

	int dpll_reg = DPLL(crtc->pipe);

	enum dpio_channel port = vlv_pipe_to_channel(pipe);

	u32 val, loopfilter, intcoeff;

	u32 loopfilter, intcoeff;

	u32 bestn, bestm1, bestm2, bestp1, bestp2, bestm2_frac;

	int refclk;
@@ -5543,11 +5543,6 @@ static void chv_update_pll(struct intel_crtc *crtc) 


	mutex_lock(&dev_priv->dpio_lock);



	/* Propagate soft reset to data lane reset */

	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS_DW0(port));

	val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET);

	vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW0(port), val);



	/* p1 and p2 divider */

	vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW13(port),

			5 << DPIO_CHV_S1_DIV_SHIFT |

drivers/gpu/drm/i915/intel_dp.c

+25 −0
Original line number Diff line number Diff line
@@ -1865,6 +1865,30 @@ static void vlv_post_disable_dp(struct intel_encoder *encoder) 
	intel_dp_link_down(intel_dp);

}



static void chv_post_disable_dp(struct intel_encoder *encoder)

{

	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);

	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);

	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc =

		to_intel_crtc(encoder->base.crtc);

	enum dpio_channel ch = vlv_dport_to_channel(dport);

	enum pipe pipe = intel_crtc->pipe;

	u32 val;



	intel_dp_link_down(intel_dp);



	mutex_lock(&dev_priv->dpio_lock);



	/* Propagate soft reset to data lane reset */

	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS_DW0(ch));

	val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET);

	vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW0(ch), val);



	mutex_unlock(&dev_priv->dpio_lock);

}



static void intel_enable_dp(struct intel_encoder *encoder)

{

	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
@@ -4243,6 +4267,7 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port) 
	if (IS_CHERRYVIEW(dev)) {

		intel_encoder->pre_enable = chv_pre_enable_dp;

		intel_encoder->enable = vlv_enable_dp;

		intel_encoder->post_disable = chv_post_disable_dp;

	} else if (IS_VALLEYVIEW(dev)) {

		intel_encoder->pre_pll_enable = vlv_dp_pre_pll_enable;

		intel_encoder->pre_enable = vlv_pre_enable_dp;

drivers/gpu/drm/i915/intel_hdmi.c

+22 −0
Original line number Diff line number Diff line
@@ -1245,6 +1245,27 @@ static void vlv_hdmi_post_disable(struct intel_encoder *encoder) 
	mutex_unlock(&dev_priv->dpio_lock);

}



static void chv_hdmi_post_disable(struct intel_encoder *encoder)

{

	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);

	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc =

		to_intel_crtc(encoder->base.crtc);

	enum dpio_channel ch = vlv_dport_to_channel(dport);

	enum pipe pipe = intel_crtc->pipe;

	u32 val;



	mutex_lock(&dev_priv->dpio_lock);



	/* Propagate soft reset to data lane reset */

	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS_DW0(ch));

	val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET);

	vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW0(ch), val);



	mutex_unlock(&dev_priv->dpio_lock);

}



static void chv_hdmi_pre_enable(struct intel_encoder *encoder)

{

	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
@@ -1469,6 +1490,7 @@ void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port) 
	if (IS_CHERRYVIEW(dev)) {

		intel_encoder->pre_enable = chv_hdmi_pre_enable;

		intel_encoder->enable = vlv_enable_hdmi;

		intel_encoder->post_disable = chv_hdmi_post_disable;

	} else if (IS_VALLEYVIEW(dev)) {

		intel_encoder->pre_pll_enable = vlv_hdmi_pre_pll_enable;

		intel_encoder->pre_enable = vlv_hdmi_pre_enable;