Merge "Merge android-4.9.200(851ba64) into msm-4.9" (57ff96e4) · Commits · e / devices / android_kernel_fairphone_FP3

Makefile

+13 −1

Original line number	Diff line number	Diff line
		VERSION = 4
		PATCHLEVEL = 9
		SUBLEVEL = 199
		SUBLEVEL = 200
		EXTRAVERSION =
		NAME = Roaring Lionus

		@@ -940,6 +940,18 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=date-time)
		# enforce correct pointer usage
		KBUILD_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types)

		# Require designated initializers for all marked structures
		KBUILD_CFLAGS += $(call cc-option,-Werror=designated-init)

		# change __FILE__ to the relative path from the srctree
		KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)

		# ensure -fcf-protection is disabled when using retpoline as it is
		# incompatible with -mindirect-branch=thunk-extern
		ifdef CONFIG_RETPOLINE
		KBUILD_CFLAGS += $(call cc-option,-fcf-protection=none)
		endif

		# use the deterministic mode of AR if available
		KBUILD_ARFLAGS := $(call ar-option,D)

arch/arm/boot/dts/imx7s.dtsi

+4 −4

Original line number	Diff line number	Diff line
		@@ -437,7 +437,7 @@
		compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
		reg = <0x302d0000 0x10000>;
		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX7D_CLK_DUMMY>,
		clocks = <&clks IMX7D_GPT1_ROOT_CLK>,
		<&clks IMX7D_GPT1_ROOT_CLK>;
		clock-names = "ipg", "per";
		};
		@@ -446,7 +446,7 @@
		compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
		reg = <0x302e0000 0x10000>;
		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX7D_CLK_DUMMY>,
		clocks = <&clks IMX7D_GPT2_ROOT_CLK>,
		<&clks IMX7D_GPT2_ROOT_CLK>;
		clock-names = "ipg", "per";
		status = "disabled";
		@@ -456,7 +456,7 @@
		compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
		reg = <0x302f0000 0x10000>;
		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX7D_CLK_DUMMY>,
		clocks = <&clks IMX7D_GPT3_ROOT_CLK>,
		<&clks IMX7D_GPT3_ROOT_CLK>;
		clock-names = "ipg", "per";
		status = "disabled";
		@@ -466,7 +466,7 @@
		compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
		reg = <0x30300000 0x10000>;
		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX7D_CLK_DUMMY>,
		clocks = <&clks IMX7D_GPT4_ROOT_CLK>,
		<&clks IMX7D_GPT4_ROOT_CLK>;
		clock-names = "ipg", "per";
		status = "disabled";

arch/arm/boot/dts/logicpd-torpedo-som.dtsi

+4 −0

Original line number	Diff line number	Diff line
		@@ -266,3 +266,7 @@
		&twl_gpio {
		ti,use-leds;
		};

		&twl_keypad {
		status = "disabled";
		};

arch/arm/mach-davinci/dm365.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -864,8 +864,8 @@ static s8 dm365_queue_priority_mapping[][2] = {
		};

		static const struct dma_slave_map dm365_edma_map[] = {
		{ "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 2) },
		{ "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 3) },
		{ "davinci-mcbsp", "tx", EDMA_FILTER_PARAM(0, 2) },
		{ "davinci-mcbsp", "rx", EDMA_FILTER_PARAM(0, 3) },
		{ "davinci_voicecodec", "tx", EDMA_FILTER_PARAM(0, 2) },
		{ "davinci_voicecodec", "rx", EDMA_FILTER_PARAM(0, 3) },
		{ "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) },

arch/arm/mm/alignment.c

+36 −8

Original line number	Diff line number	Diff line
		@@ -767,6 +767,36 @@ do_alignment_t32_to_handler(unsigned long pinstr, struct pt_regs regs,
		return NULL;
		}

		static int alignment_get_arm(struct pt_regs regs, u32 ip, unsigned long *inst)
		{
		u32 instr = 0;
		int fault;

		if (user_mode(regs))
		fault = get_user(instr, ip);
		else
		fault = probe_kernel_address(ip, instr);

		*inst = __mem_to_opcode_arm(instr);

		return fault;
		}

		static int alignment_get_thumb(struct pt_regs regs, u16 ip, u16 *inst)
		{
		u16 instr = 0;
		int fault;

		if (user_mode(regs))
		fault = get_user(instr, ip);
		else
		fault = probe_kernel_address(ip, instr);

		*inst = __mem_to_opcode_thumb16(instr);

		return fault;
		}

		static int
		do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
		{
		@@ -774,10 +804,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
		unsigned long instr = 0, instrptr;
		int (handler)(unsigned long addr, unsigned long instr, struct pt_regs regs);
		unsigned int type;
		unsigned int fault;
		u16 tinstr = 0;
		int isize = 4;
		int thumb2_32b = 0;
		int fault;

		if (interrupts_enabled(regs))
		local_irq_enable();
		@@ -786,15 +816,14 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)

		if (thumb_mode(regs)) {
		u16 ptr = (u16 )(instrptr & ~1);
		fault = probe_kernel_address(ptr, tinstr);
		tinstr = __mem_to_opcode_thumb16(tinstr);

		fault = alignment_get_thumb(regs, ptr, &tinstr);
		if (!fault) {
		if (cpu_architecture() >= CPU_ARCH_ARMv7 &&
		IS_T32(tinstr)) {
		/* Thumb-2 32-bit */
		u16 tinst2 = 0;
		fault = probe_kernel_address(ptr + 1, tinst2);
		tinst2 = __mem_to_opcode_thumb16(tinst2);
		u16 tinst2;
		fault = alignment_get_thumb(regs, ptr + 1, &tinst2);
		instr = __opcode_thumb32_compose(tinstr, tinst2);
		thumb2_32b = 1;
		} else {
		@@ -803,8 +832,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
		}
		}
		} else {
		fault = probe_kernel_address((void *)instrptr, instr);
		instr = __mem_to_opcode_arm(instr);
		fault = alignment_get_arm(regs, (void *)instrptr, &instr);
		}

		if (fault) {