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Commit 577379aa authored by Channagoud Kadabi's avatar Channagoud Kadabi Committed by Gerrit - the friendly Code Review server
Browse files

Merge "Merge remote-tracking branch '4.9/tmp-82ab0744' into 4.9" into msm-4.9

parents 20e0464b 110cce4a

Documentation/arm64/silicon-errata.txt

+23 −21
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ will be updated when new workarounds are committed and backported to 
stable kernels.



| Implementor    | Component       | Erratum ID      | Kconfig                     |

+----------------+-----------------+-----------------+-------------------------+

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A53      | #826319         | ARM64_ERRATUM_826319        |

| ARM            | Cortex-A53      | #827319         | ARM64_ERRATUM_827319        |

| ARM            | Cortex-A53      | #824069         | ARM64_ERRATUM_824069        |
@@ -63,3 +63,5 @@ stable kernels. 
| Cavium         | ThunderX SMMUv2 | #27704          | N/A                         |

|                |                 |                 |                             |

| Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |

|                |                 |                 |                             |

| Qualcomm Tech. | QDF2400 ITS     | E0065           | QCOM_QDF2400_ERRATUM_0065   |

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 9

SUBLEVEL = 16

SUBLEVEL = 17

EXTRAVERSION =

NAME = Roaring Lionus

arch/arm64/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -478,6 +478,16 @@ config CAVIUM_ERRATUM_27456 


	  If unsure, say Y.



config QCOM_QDF2400_ERRATUM_0065

	bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size"

	default y

	help

	  On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports

	  ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have

	  been indicated as 16Bytes (0xf), not 8Bytes (0x7).



	  If unsure, say Y.



endmenu

arch/arm64/kvm/hyp/tlb.c

+55 −9
Original line number Diff line number Diff line
@@ -17,14 +17,62 @@ 


#include <asm/kvm_hyp.h>



static void __hyp_text __tlb_switch_to_guest_vhe(struct kvm *kvm)

{

	u64 val;



	/*

	 * With VHE enabled, we have HCR_EL2.{E2H,TGE} = {1,1}, and

	 * most TLB operations target EL2/EL0. In order to affect the

	 * guest TLBs (EL1/EL0), we need to change one of these two

	 * bits. Changing E2H is impossible (goodbye TTBR1_EL2), so

	 * let's flip TGE before executing the TLB operation.

	 */

	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	val = read_sysreg(hcr_el2);

	val &= ~HCR_TGE;

	write_sysreg(val, hcr_el2);

	isb();

}



static void __hyp_text __tlb_switch_to_guest_nvhe(struct kvm *kvm)

{

	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	isb();

}



static hyp_alternate_select(__tlb_switch_to_guest,

			    __tlb_switch_to_guest_nvhe,

			    __tlb_switch_to_guest_vhe,

			    ARM64_HAS_VIRT_HOST_EXTN);



static void __hyp_text __tlb_switch_to_host_vhe(struct kvm *kvm)

{

	/*

	 * We're done with the TLB operation, let's restore the host's

	 * view of HCR_EL2.

	 */

	write_sysreg(0, vttbr_el2);

	write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);

}



static void __hyp_text __tlb_switch_to_host_nvhe(struct kvm *kvm)

{

	write_sysreg(0, vttbr_el2);

}



static hyp_alternate_select(__tlb_switch_to_host,

			    __tlb_switch_to_host_nvhe,

			    __tlb_switch_to_host_vhe,

			    ARM64_HAS_VIRT_HOST_EXTN);



void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)

{

	dsb(ishst);



	/* Switch to requested VMID */

	kvm = kern_hyp_va(kvm);

	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	isb();

	__tlb_switch_to_guest()(kvm);



	/*

	 * We could do so much better if we had the VA as well.
@@ -45,7 +93,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) 
	dsb(ish);

	isb();



	write_sysreg(0, vttbr_el2);

	__tlb_switch_to_host()(kvm);

}



void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
@@ -54,14 +102,13 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) 


	/* Switch to requested VMID */

	kvm = kern_hyp_va(kvm);

	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	isb();

	__tlb_switch_to_guest()(kvm);



	asm volatile("tlbi vmalls12e1is" : : );

	dsb(ish);

	isb();



	write_sysreg(0, vttbr_el2);

	__tlb_switch_to_host()(kvm);

}



void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
@@ -69,14 +116,13 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) 
	struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);



	/* Switch to requested VMID */

	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	isb();

	__tlb_switch_to_guest()(kvm);



	asm volatile("tlbi vmalle1" : : );

	dsb(nsh);

	isb();



	write_sysreg(0, vttbr_el2);

	__tlb_switch_to_host()(kvm);

}



void __hyp_text __kvm_flush_vm_context(void)

arch/powerpc/crypto/crc32c-vpmsum_glue.c

+1 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ static int crc32c_vpmsum_cra_init(struct crypto_tfm *tfm) 
{

	u32 *key = crypto_tfm_ctx(tfm);



	*key = 0;

	*key = ~0;



	return 0;

}