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Commit 571042c6 authored by Osvaldo Banuelos's avatar Osvaldo Banuelos
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clk: qcom: gcc-sdxpoorwills: add additional USB/PCIe clocks 



Add missing PCIE and USB30 clocks to the list of supported
GCC clocks in sdxpoowrills.

Signed-off-by: default avatarOsvaldo Banuelos <osvaldob@codeaurora.org>
Change-Id: I9bab0b46bb60a2a44639b9f4d891647b9527c5ec
parent 492b05c7

include/dt-bindings/clock/qcom,gcc-sdxpoorwills.h

+37 −32
Original line number Diff line number Diff line
@@ -63,37 +63,39 @@ 
#define GCC_PCIE_AUX_CLK					45

#define GCC_PCIE_AUX_PHY_CLK_SRC				46

#define GCC_PCIE_CFG_AHB_CLK					47

#define GCC_PCIE_MSTR_AXI_CLK					48

#define GCC_PCIE_PHY_REFGEN_CLK					49

#define GCC_PCIE_PHY_REFGEN_CLK_SRC				50

#define GCC_PCIE_PIPE_CLK					51

#define GCC_PCIE_SLEEP_CLK					52

#define GCC_PCIE_SLV_AXI_CLK					53

#define GCC_PCIE_SLV_Q2A_AXI_CLK				54

#define GCC_PDM2_CLK						55

#define GCC_PDM2_CLK_SRC					56

#define GCC_PDM_AHB_CLK						57

#define GCC_PDM_XO4_CLK						58

#define GCC_PRNG_AHB_CLK					59

#define GCC_SDCC1_AHB_CLK					60

#define GCC_SDCC1_APPS_CLK					61

#define GCC_SDCC1_APPS_CLK_SRC					62

#define GCC_SPMI_FETCHER_AHB_CLK				63

#define GCC_SPMI_FETCHER_CLK					64

#define GCC_SPMI_FETCHER_CLK_SRC				65

#define GCC_SYS_NOC_CPUSS_AHB_CLK				66

#define GCC_USB30_MASTER_CLK					67

#define GCC_USB30_MASTER_CLK_SRC				68

#define GCC_USB30_MOCK_UTMI_CLK					69

#define GCC_USB30_MOCK_UTMI_CLK_SRC				70

#define GCC_USB30_SLEEP_CLK					71

#define GCC_USB3_PHY_AUX_CLK					72

#define GCC_USB3_PHY_AUX_CLK_SRC				73

#define GCC_USB3_PHY_PIPE_CLK					74

#define GCC_USB_PHY_CFG_AHB2PHY_CLK				75

#define GCC_XO_DIV4_CLK						76

#define GPLL0							77

#define GPLL0_OUT_EVEN						78

#define GCC_PCIE_0_CLKREF_EN					48

#define GCC_PCIE_MSTR_AXI_CLK					49

#define GCC_PCIE_PHY_REFGEN_CLK					50

#define GCC_PCIE_PHY_REFGEN_CLK_SRC				51

#define GCC_PCIE_PIPE_CLK					52

#define GCC_PCIE_SLEEP_CLK					53

#define GCC_PCIE_SLV_AXI_CLK					54

#define GCC_PCIE_SLV_Q2A_AXI_CLK				55

#define GCC_PDM2_CLK						56

#define GCC_PDM2_CLK_SRC					57

#define GCC_PDM_AHB_CLK						58

#define GCC_PDM_XO4_CLK						59

#define GCC_PRNG_AHB_CLK					60

#define GCC_SDCC1_AHB_CLK					61

#define GCC_SDCC1_APPS_CLK					62

#define GCC_SDCC1_APPS_CLK_SRC					63

#define GCC_SPMI_FETCHER_AHB_CLK				64

#define GCC_SPMI_FETCHER_CLK					65

#define GCC_SPMI_FETCHER_CLK_SRC				66

#define GCC_SYS_NOC_CPUSS_AHB_CLK				67

#define GCC_USB30_MASTER_CLK					68

#define GCC_USB30_MASTER_CLK_SRC				69

#define GCC_USB30_MOCK_UTMI_CLK					70

#define GCC_USB30_MOCK_UTMI_CLK_SRC				71

#define GCC_USB30_SLEEP_CLK					72

#define GCC_USB3_PRIM_CLKREF_CLK				73

#define GCC_USB3_PHY_AUX_CLK					74

#define GCC_USB3_PHY_AUX_CLK_SRC				75

#define GCC_USB3_PHY_PIPE_CLK					76

#define GCC_USB_PHY_CFG_AHB2PHY_CLK				77

#define GCC_XO_DIV4_CLK						78

#define GPLL0							79

#define GPLL0_OUT_EVEN						80



/* GDSCs */

#define PCIE_GDSC						0
@@ -118,6 +120,9 @@ 
#define GCC_SDCC1_BCR						12

#define GCC_SPMI_FETCHER_BCR					13

#define GCC_USB30_BCR						14

#define GCC_USB_PHY_CFG_AHB2PHY_BCR				15

#define GCC_USB3_PHY_BCR					15

#define GCC_USB3PHY_PHY_BCR					16

#define GCC_QUSB2PHY_BCR					17

#define GCC_USB_PHY_CFG_AHB2PHY_BCR				18



#endif