Merge "msm: kgsl: Log register offset when fenced write fails" (56c91ae1) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/msm/kgsl_gmu.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -1638,6 +1638,8 @@ int adreno_gmu_fenced_write(struct adreno_device *adreno_dev,
		unsigned int fence_mask)
		{
		unsigned int status, i;
		struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);
		unsigned int reg_offset = gpudev->reg_offsets->offsets[offset];

		adreno_writereg(adreno_dev, offset, val);

		@@ -1662,6 +1664,6 @@ int adreno_gmu_fenced_write(struct adreno_device *adreno_dev,
		}

		dev_err(adreno_dev->dev.dev,
		"GMU fenced register write timed out: reg %x\n", offset);
		"GMU fenced register write timed out: reg 0x%x\n", reg_offset);
		return -ETIMEDOUT;
		}