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Commit 56825c88 authored Jul 08, 2010 by Anton Vorontsov Committed by Kumar Gala Jul 11, 2010

powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)



spi_t was removed in commit 644b2a68
("powerpc/cpm: Remove SPI defines and spi structs"), the commit assumed
that spi_t isn't used anywhere outside of the spi_mpc8xxx driver. But
it appears that the struct is needed for micropatch code. So, let's
reintroduce the struct.

Fixes the following build issue:

    CC      arch/powerpc/sysdev/micropatch.o
  micropatch.c: In function 'cpm_load_patch':
  micropatch.c:629: error: expected '=', ',', ';', 'asm' or '__attribute__' before '*' token
  micropatch.c:629: error: 'spp' undeclared (first use in this function)
  micropatch.c:629: error: (Each undeclared identifier is reported only once
  micropatch.c:629: error: for each function it appears in.)

Reported-by: LEROY Christophe <christophe.leroy@c-s.fr>
Reported-by: Tony Breeds <tony@bakeyournoodle.com>
Cc: <stable@kernel.org> [ .33, .34 ]
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

parent e467e104

arch/powerpc/include/asm/cpm.h

+24 −0

Original line number	Original line	Diff line number	Diff line
	@@ -6,6 +6,30 @@
	#include <linux/errno.h>		#include <linux/errno.h>
	#include <linux/of.h>		#include <linux/of.h>

			/*
			* SPI Parameter RAM common to QE and CPM.
			*/
			struct spi_pram {
			__be16 rbase; /* Rx Buffer descriptor base address */
			__be16 tbase; /* Tx Buffer descriptor base address */
			u8 rfcr; /* Rx function code */
			u8 tfcr; /* Tx function code */
			__be16 mrblr; /* Max receive buffer length */
			__be32 rstate; /* Internal */
			__be32 rdp; /* Internal */
			__be16 rbptr; /* Internal */
			__be16 rbc; /* Internal */
			__be32 rxtmp; /* Internal */
			__be32 tstate; /* Internal */
			__be32 tdp; /* Internal */
			__be16 tbptr; /* Internal */
			__be16 tbc; /* Internal */
			__be32 txtmp; /* Internal */
			__be32 res; /* Tx temp. */
			__be16 rpbase; /* Relocation pointer (CPM1 only) */
			__be16 res1; /* Reserved */
			};

	/*		/*
	* USB Controller pram common to QE and CPM.		* USB Controller pram common to QE and CPM.
	*/		*/

arch/powerpc/sysdev/micropatch.c

+4 −3

Original line number	Original line	Diff line number	Diff line
	@@ -16,6 +16,7 @@
	#include <asm/page.h>		#include <asm/page.h>
	#include <asm/pgtable.h>		#include <asm/pgtable.h>
	#include <asm/8xx_immap.h>		#include <asm/8xx_immap.h>
			#include <asm/cpm.h>
	#include <asm/cpm1.h>		#include <asm/cpm1.h>

	/*		/*
	@@ -626,7 +627,7 @@ cpm_load_patch(cpm8xx_t *cp)
	volatile uint dp; / Dual-ported RAM. */		volatile uint dp; / Dual-ported RAM. */
	volatile cpm8xx_t *commproc;		volatile cpm8xx_t *commproc;
	volatile iic_t *iip;		volatile iic_t *iip;
	volatile spi_t *spp;		volatile struct spi_pram *spp;
	volatile smc_uart_t *smp;		volatile smc_uart_t *smp;
	int i;		int i;

	@@ -668,8 +669,8 @@ cpm_load_patch(cpm8xx_t *cp)
	/* Put SPI above the IIC, also 32-byte aligned.		/* Put SPI above the IIC, also 32-byte aligned.
	*/		*/
	i = (RPBASE + sizeof(iic_t) + 31) & ~31;		i = (RPBASE + sizeof(iic_t) + 31) & ~31;
	spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];		spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
	spp->spi_rpbase = i;		spp->rpbase = i;

	# if defined(CONFIG_I2C_SPI_UCODE_PATCH)		# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
	commproc->cp_cpmcr1 = 0x802a;		commproc->cp_cpmcr1 = 0x802a;

drivers/spi/spi_mpc8xxx.c

+0 −22

Original line number	Original line	Diff line number	Diff line
	@@ -66,28 +66,6 @@ struct mpc8xxx_spi_reg {
	__be32 receive;		__be32 receive;
	};		};

	/* SPI Parameter RAM */
	struct spi_pram {
	__be16 rbase; /* Rx Buffer descriptor base address */
	__be16 tbase; /* Tx Buffer descriptor base address */
	u8 rfcr; /* Rx function code */
	u8 tfcr; /* Tx function code */
	__be16 mrblr; /* Max receive buffer length */
	__be32 rstate; /* Internal */
	__be32 rdp; /* Internal */
	__be16 rbptr; /* Internal */
	__be16 rbc; /* Internal */
	__be32 rxtmp; /* Internal */
	__be32 tstate; /* Internal */
	__be32 tdp; /* Internal */
	__be16 tbptr; /* Internal */
	__be16 tbc; /* Internal */
	__be32 txtmp; /* Internal */
	__be32 res; /* Tx temp. */
	__be16 rpbase; /* Relocation pointer (CPM1 only) */
	__be16 res1; /* Reserved */
	};

	/* SPI Controller mode register definitions */		/* SPI Controller mode register definitions */
	#define SPMODE_LOOP (1 << 30)		#define SPMODE_LOOP (1 << 30)
	#define SPMODE_CI_INACTIVEHIGH (1 << 29)		#define SPMODE_CI_INACTIVEHIGH (1 << 29)