Commit 564907b7 authored Dec 13, 2018 by Will Deacon Committed by Greg Kroah-Hartman Jan 29, 2020

arm64: kpti: Whitelist Cortex-A CPUs that don't implement the CSV3 field



commit 2a355ec25729053bb9a1a89b6c1d1cdd6c3b3fb1 upstream.

While the CSV3 field of the ID_AA64_PFR0 CPU ID register can be checked
to see if a CPU is susceptible to Meltdown and therefore requires kpti
to be enabled, existing CPUs do not implement this field.

We therefore whitelist all unaffected Cortex-A CPUs that do not implement
the CSV3 field.

Signed-off-by: Will Deacon <will.deacon@arm.com>
[florian: adjust whilelist location and table to stable-4.9.y]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 8973a61e

arch/arm64/kernel/cpufeature.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -789,6 +789,11 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
		switch (read_cpuid_id() & MIDR_CPU_MODEL_MASK) {
		case MIDR_CAVIUM_THUNDERX2:
		case MIDR_BRCM_VULCAN:
		case MIDR_CORTEX_A53:
		case MIDR_CORTEX_A55:
		case MIDR_CORTEX_A57:
		case MIDR_CORTEX_A72:
		case MIDR_CORTEX_A73:
		return false;
		}