Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 562e54d1 authored by Paul Walmsley's avatar Paul Walmsley
Browse files

ARM: OMAP2+: powerdomain: fix whitespace, improve flag comments



Fix some whitespace problems introduced by commit
da03ce65 ("OMAP3: powerdomain data:
add voltage domains").  Also, improve the documentation for the struct
powerdomain.flags field.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
parent 92493870
Loading
Loading
Loading
Loading
+14 −12
Original line number Diff line number Diff line
@@ -43,18 +43,20 @@
#define PWRSTS_OFF_RET_ON	(PWRSTS_OFF_RET | PWRSTS_ON)


/* Powerdomain flags */
#define PWRDM_HAS_HDWR_SAR	(1 << 0) /* hardware save-and-restore support */
#define PWRDM_HAS_MPU_QUIRK	(1 << 1) /* MPU pwr domain has MEM bank 0 bits
					  * in MEM bank 1 position. This is
					  * true for OMAP3430
					  */
#define PWRDM_HAS_LOWPOWERSTATECHANGE	(1 << 2) /*
						  * support to transition from a
						  * sleep state to a lower sleep
						  * state without waking up the
						  * powerdomain
/*
 * Powerdomain flags (struct powerdomain.flags)
 *
 * PWRDM_HAS_HDWR_SAR - powerdomain has hardware save-and-restore support
 *
 * PWRDM_HAS_MPU_QUIRK - MPU pwr domain has MEM bank 0 bits in MEM
 * bank 1 position. This is true for OMAP3430
 *
 * PWRDM_HAS_LOWPOWERSTATECHANGE - can transition from a sleep state
 * to a lower sleep state without waking up the powerdomain
 */
#define PWRDM_HAS_HDWR_SAR		BIT(0)
#define PWRDM_HAS_MPU_QUIRK		BIT(1)
#define PWRDM_HAS_LOWPOWERSTATECHANGE	BIT(2)

/*
 * Number of memory banks that are power-controllable.	On OMAP4430, the
+22 −22

File changed.

Contains only whitespace changes.

+2 −2

File changed.

Contains only whitespace changes.

+4 −4

File changed.

Contains only whitespace changes.