Commit 559205f2 authored Dec 19, 2017 by Vignesh R Committed by Greg Kroah-Hartman Mar 24, 2018

dmaengine: ti-dma-crossbar: Fix event mapping for TPCC_EVT_MUX_60_63




[ Upstream commit d087f15786021a9605b20f4c678312510be4cac1 ]

Register layout of a typical TPCC_EVT_MUX_M_N register is such that the
lowest numbered event is at the lowest byte address and highest numbered
event at highest byte address. But TPCC_EVT_MUX_60_63 register layout is
different,  in that the lowest numbered event is at the highest address
and highest numbered event is at the lowest address. Therefore, modify
ti_am335x_xbar_write() to handle TPCC_EVT_MUX_60_63 register
accordingly.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent bc0e7313

drivers/dma/ti-dma-crossbar.c

+9 −1

Original line number	Diff line number	Diff line
		@@ -54,6 +54,14 @@ struct ti_am335x_xbar_map {

		static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val)
		{
		/*
		* TPCC_EVT_MUX_60_63 register layout is different than the
		* rest, in the sense, that event 63 is mapped to lowest byte
		* and event 60 is mapped to highest, handle it separately.
		*/
		if (event >= 60 && event <= 63)
		writeb_relaxed(val, iomem + (63 - event % 4));
		else
		writeb_relaxed(val, iomem + event);
		}