Commit 552e8e39 authored Apr 22, 2020 by Evalds Iodzevics Committed by Greg Kroah-Hartman Apr 24, 2020

x86/microcode/intel: replace sync_core() with native_cpuid_reg(eax)



On Intel it is required to do CPUID(1) before reading the microcode
revision MSR. Current code in 4.4 an 4.9 relies on sync_core() to call
CPUID, unfortunately on 32 bit machines code inside sync_core() always
jumps past CPUID instruction as it depends on data structure boot_cpu_data
witch are not populated correctly so early in boot sequence.

It depends on:
commit 5dedade6dfa2 ("x86/CPU: Add native CPUID variants returning a single
datum")

This patch is for 4.4 but also should apply to 4.9

Signed-off-by: Evalds Iodzevics <evalds.iodzevics@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 73767759

arch/x86/include/asm/microcode_intel.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -59,7 +59,7 @@ static inline u32 intel_get_microcode_revision(void)
		native_wrmsrl(MSR_IA32_UCODE_REV, 0);

		/* As documented in the SDM: Do a CPUID 1 here */
		sync_core();
		native_cpuid_eax(1);

		/* get the current revision from MSR 0x8B */
		native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);