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Commit 54e7ad47 authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Mark Brown
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spi: mpc512x-psc: adapt mpc5121-psc document to reality 



The drivers support MPC5125 additionally to MPC5121, and there is an spi
mode that is also supported. Additionally some minor corrections are
done.

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8bf96098

Documentation/devicetree/bindings/powerpc/fsl/mpc5121-psc.txt

+18 −6
Original line number Diff line number Diff line
@@ -6,14 +6,14 @@ PSC in UART mode 
For PSC in UART mode the needed PSC serial devices

are specified by fsl,mpc5121-psc-uart nodes in the

fsl,mpc5121-immr SoC node. Additionally the PSC FIFO

Controller node fsl,mpc5121-psc-fifo is requered there:

Controller node fsl,mpc5121-psc-fifo is required there:



fsl,mpc5121-psc-uart nodes

fsl,mpc512x-psc-uart nodes

--------------------------



Required properties :

 - compatible : Should contain "fsl,mpc5121-psc-uart" and "fsl,mpc5121-psc"

 - cell-index : Index of the PSC in hardware

 - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc"

   Supported <soc>s: mpc5121, mpc5125

 - reg : Offset and length of the register set for the PSC device

 - interrupts : <a b> where a is the interrupt number of the

   PSC FIFO Controller and b is a field that represents an
@@ -25,12 +25,21 @@ Recommended properties : 
 - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4)

 - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4)



PSC in SPI mode

---------------



fsl,mpc5121-psc-fifo node

Similar to the UART mode a PSC can be operated in SPI mode. The compatible used

for that is fsl,mpc5121-psc-spi. It requires a fsl,mpc5121-psc-fifo as well.

The required and recommended properties are identical to the

fsl,mpc5121-psc-uart nodes, just use spi instead of uart in the compatible

string.



fsl,mpc512x-psc-fifo node

-------------------------



Required properties :

 - compatible : Should be "fsl,mpc5121-psc-fifo"

 - compatible : Should be "fsl,<soc>-psc-fifo"

   Supported <soc>s: mpc5121, mpc5125

 - reg : Offset and length of the register set for the PSC

         FIFO Controller

 - interrupts : <a b> where a is the interrupt number of the
@@ -39,6 +48,9 @@ Required properties : 
 - interrupt-parent : the phandle for the interrupt controller that

   services interrupts for this device.



Recommended properties :

 - clocks : specifies the clock needed to operate the fifo controller

 - clock-names : name(s) for the clock(s) listed in clocks



Example for a board using PSC0 and PSC1 devices in serial mode: