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Commit 549f3a12 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "This is just a regular fixes pull, mostly nouveau and i915, the i915
  ones fix RC6 on Sandybridge after suspend/resume, which I think people
  have be wanting for quite a while!

  Now you shouldn't wish for more patches, as the new mutex/reservation
  code found a number of problems with the qxl driver, and it currently
  makes lockdep angry, I'm working on a set of fixes for it, but its a
  bit large, I'll submit them separately later today or tomorrow once
  I've banged on them a bit more, just warning you in advance :-)"

Yeah, I'm definitely over the whole "wish for more patches" thing.

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/crtc-helper: explicit DPMS on after modeset
  drm/i915: fix up gt init sequence fallout
  drm/i915: Serialize almost all register access
  drm/i915: quirk no PCH_PWM_ENABLE for Dell XPS13 backlight
  drm/i915: correctly restore fences with objects attached
  drm/i915: Fix dereferencing invalid connectors in is_crtc_connector_off()
  drm/i915: Sanitize shared dpll state
  drm/i915: fix long-standing SNB regression in power consumption after resume v2
  drm/i915: Preserve the DDI_A_4_LANES bit from the bios
  drm/i915: fix pfit regression for non-autoscaled resolutions
  drm/i915: fix up readout of the lvds dither bit on gen2/3
  drm/nouveau: do not allow negative sizes for now
  drm/nouveau: add falcon interrupt handler
  drm/nouveau: use dedicated channel for async moves on GT/GF chipsets.
  drm/nouveau: bump fence timeout to 15 seconds
  drm/nouveau: do not unpin in nouveau_gem_object_del
  drm/nv50/kms: fix pin refcnt leaks
  drm/nouveau: fix some error-path leaks in fbcon handling code
  drm/nouveau: fix locking issues in page flipping paths
parents 42577ca8 058ca4a2

drivers/gpu/drm/drm_crtc_helper.c

+11 −16
Original line number Diff line number Diff line
@@ -677,6 +677,11 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) 
					/* don't break so fail path works correct */

					fail = 1;

				break;



				if (connector->dpms != DRM_MODE_DPMS_ON) {

					DRM_DEBUG_KMS("connector dpms not on, full mode switch\n");

					mode_changed = true;

				}

			}

		}
@@ -754,6 +759,12 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) 
				ret = -EINVAL;

				goto fail;

			}

			DRM_DEBUG_KMS("Setting connector DPMS state to on\n");

			for (i = 0; i < set->num_connectors; i++) {

				DRM_DEBUG_KMS("\t[CONNECTOR:%d:%s] set DPMS on\n", set->connectors[i]->base.id,

					      drm_get_connector_name(set->connectors[i]));

				set->connectors[i]->funcs->dpms(set->connectors[i], DRM_MODE_DPMS_ON);

			}

		}

		drm_helper_disable_unused_functions(dev);

	} else if (fb_changed) {
@@ -771,22 +782,6 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) 
		}

	}



	/*

	 * crtc set_config helpers implicit set the crtc and all connected

	 * encoders to DPMS on for a full mode set. But for just an fb update it

	 * doesn't do that. To not confuse userspace, do an explicit DPMS_ON

	 * unconditionally. This will also ensure driver internal dpms state is

	 * consistent again.

	 */

	if (set->crtc->enabled) {

		DRM_DEBUG_KMS("Setting connector DPMS state to on\n");

		for (i = 0; i < set->num_connectors; i++) {

			DRM_DEBUG_KMS("\t[CONNECTOR:%d:%s] set DPMS on\n", set->connectors[i]->base.id,

				      drm_get_connector_name(set->connectors[i]));

			set->connectors[i]->funcs->dpms(set->connectors[i], DRM_MODE_DPMS_ON);

		}

	}



	kfree(save_connectors);

	kfree(save_encoders);

	kfree(save_crtcs);

drivers/gpu/drm/i915/i915_dma.c

+9 −9
Original line number Diff line number Diff line
@@ -1495,6 +1495,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	dev_priv->dev = dev;

	dev_priv->info = info;



	spin_lock_init(&dev_priv->irq_lock);

	spin_lock_init(&dev_priv->gpu_error.lock);

	spin_lock_init(&dev_priv->rps.lock);

	spin_lock_init(&dev_priv->backlight.lock);

	mutex_init(&dev_priv->dpio_lock);

	mutex_init(&dev_priv->rps.hw_lock);

	mutex_init(&dev_priv->modeset_restore_lock);



	i915_dump_device_info(dev_priv);



	if (i915_get_bridge_dev(dev)) {
@@ -1585,6 +1593,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	intel_detect_pch(dev);



	intel_irq_init(dev);

	intel_gt_sanitize(dev);

	intel_gt_init(dev);



	/* Try to make sure MCHBAR is enabled before poking at it */
@@ -1610,15 +1619,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	if (!IS_I945G(dev) && !IS_I945GM(dev))

		pci_enable_msi(dev->pdev);



	spin_lock_init(&dev_priv->irq_lock);

	spin_lock_init(&dev_priv->gpu_error.lock);

	spin_lock_init(&dev_priv->rps.lock);

	spin_lock_init(&dev_priv->backlight.lock);

	mutex_init(&dev_priv->dpio_lock);



	mutex_init(&dev_priv->rps.hw_lock);

	mutex_init(&dev_priv->modeset_restore_lock);



	dev_priv->num_plane = 1;

	if (IS_VALLEYVIEW(dev))

		dev_priv->num_plane = 2;

drivers/gpu/drm/i915/i915_drv.c

+8 −5
Original line number Diff line number Diff line
@@ -706,7 +706,7 @@ static int i915_drm_thaw(struct drm_device *dev) 
{

	int error = 0;



	intel_gt_reset(dev);

	intel_gt_sanitize(dev);



	if (drm_core_check_feature(dev, DRIVER_MODESET)) {

		mutex_lock(&dev->struct_mutex);
@@ -732,7 +732,7 @@ int i915_resume(struct drm_device *dev) 


	pci_set_master(dev->pdev);



	intel_gt_reset(dev);

	intel_gt_sanitize(dev);



	/*

	 * Platforms with opregion should have sane BIOS, older ones (gen3 and
@@ -1253,21 +1253,21 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg) 


#define __i915_read(x, y) \

u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \

	unsigned long irqflags; \

	u##x val = 0; \

	spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \

	if (IS_GEN5(dev_priv->dev)) \

		ilk_dummy_write(dev_priv); \

	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \

		unsigned long irqflags; \

		spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \

		if (dev_priv->forcewake_count == 0) \

			dev_priv->gt.force_wake_get(dev_priv); \

		val = read##y(dev_priv->regs + reg); \

		if (dev_priv->forcewake_count == 0) \

			dev_priv->gt.force_wake_put(dev_priv); \

		spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \

	} else { \

		val = read##y(dev_priv->regs + reg); \

	} \

	spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \

	trace_i915_reg_rw(false, reg, val, sizeof(val)); \

	return val; \

}
@@ -1280,8 +1280,10 @@ __i915_read(64, q) 


#define __i915_write(x, y) \

void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \

	unsigned long irqflags; \

	u32 __fifo_ret = 0; \

	trace_i915_reg_rw(true, reg, val, sizeof(val)); \

	spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \

	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \

		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \

	} \
@@ -1293,6 +1295,7 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \ 
		gen6_gt_check_fifodbg(dev_priv); \

	} \

	hsw_unclaimed_reg_check(dev_priv, reg); \

	spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \

}

__i915_write(8, b)

__i915_write(16, w)

drivers/gpu/drm/i915/i915_drv.h

+2 −1
Original line number Diff line number Diff line
@@ -555,6 +555,7 @@ enum intel_sbi_destination { 
#define QUIRK_PIPEA_FORCE (1<<0)

#define QUIRK_LVDS_SSC_DISABLE (1<<1)

#define QUIRK_INVERT_BRIGHTNESS (1<<2)

#define QUIRK_NO_PCH_PWM_ENABLE (1<<3)



struct intel_fbdev;

struct intel_fbc_work;
@@ -1583,7 +1584,7 @@ void i915_handle_error(struct drm_device *dev, bool wedged); 
extern void intel_irq_init(struct drm_device *dev);

extern void intel_hpd_init(struct drm_device *dev);

extern void intel_gt_init(struct drm_device *dev);

extern void intel_gt_reset(struct drm_device *dev);

extern void intel_gt_sanitize(struct drm_device *dev);



void i915_error_state_free(struct kref *error_ref);

drivers/gpu/drm/i915/i915_gem.c

+16 −2
Original line number Diff line number Diff line
@@ -2258,7 +2258,17 @@ void i915_gem_restore_fences(struct drm_device *dev) 


	for (i = 0; i < dev_priv->num_fence_regs; i++) {

		struct drm_i915_fence_reg *reg = &dev_priv->fence_regs[i];

		i915_gem_write_fence(dev, i, reg->obj);



		/*

		 * Commit delayed tiling changes if we have an object still

		 * attached to the fence, otherwise just clear the fence.

		 */

		if (reg->obj) {

			i915_gem_object_update_fence(reg->obj, reg,

						     reg->obj->tiling_mode);

		} else {

			i915_gem_write_fence(dev, i, NULL);

		}

	}

}
@@ -2795,6 +2805,10 @@ static void i915_gem_write_fence(struct drm_device *dev, int reg, 
	if (i915_gem_object_needs_mb(dev_priv->fence_regs[reg].obj))

		mb();



	WARN(obj && (!obj->stride || !obj->tiling_mode),

	     "bogus fence setup with stride: 0x%x, tiling mode: %i\n",

	     obj->stride, obj->tiling_mode);



	switch (INTEL_INFO(dev)->gen) {

	case 7:

	case 6:
@@ -2836,6 +2850,7 @@ static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj, 
		fence->obj = NULL;

		list_del_init(&fence->lru_list);

	}

	obj->fence_dirty = false;

}



static int
@@ -2965,7 +2980,6 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj) 
		return 0;



	i915_gem_object_update_fence(obj, reg, enable);

	obj->fence_dirty = false;



	return 0;

}